US4710241A
Expired / Lapsed
US
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Method of making a bipolar semiconductor device
Assignee: Toshiba Corp
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Filing: 1986-01-08
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Granted: 1987-12-01
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Expires: 2006-01-08
Abstract
Abstract An n-type buried layer is selectively formed in a surface region of a p-type semiconductor substrate. At least one insulating film is formed on the semiconductor substrate. A first opening is formed on the buried layer in the insulating film. An n-type polycrystalline silicon layer is formed in the first opening connected to the buried layer. A second opening is formed on the buried layer of the insulating film. An n-type monocrystalline silicon layer is formed in the second opening connected to the buried layer. A p-type base region is formed in the monocrystalline silicon layer and a collector region is formed in the remaining portion of the monocrystalline silicon layer. An emitter region is selectively formed in the base region.
Inventors
- 👤 Shigeru Komatsu
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 11:25
CPC Classifications
H; H10; H10D; H10D10/00; H10D10/01; H10D10/051; H10D10/054; H10D10/40; H10D10/441; H10D64/00; H10D64/01; H10D64/011; H10D64/0111; H10D64/0113; H10P; H10P14/00; H10P14/20; H10P14/24; H10P14/27; H10P14/271; H10P14/29; H10P14/2901; H10P14/2902; H10P14/2905; H10P14/34; H10P14/3402; H10P14/3404; H10P14/3411; H10W; H10W20/00; H10W20/01; H10W20/021
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
152 words
A method of manufacturing a semiconductor device, comprising the steps of: selectively forming a buried layer of a second conductivity type in a surface region of a semiconductor substrate of a first conductivity type; forming at least one insulating film on said semiconductor substrate; forming at least one first opening on said buried layer in said insulating film; forming a conductive layer in said first opening and connected to said buried layer of the second conductivity type; forming at least one second opening on said buried layer of said insulating film; forming a monocrystalline silicon layer of the second conductivity type in said second opening connected to said buried layer, said monocrystalline silicon layer being formed after forming said conductive layer; forming a region of the first conductivity type in said monocrystalline silicon layer; and selectively forming a region of the second conductivity type in the region of the first conductivity type.
Claim 2
Independent Claim
152 words
A method of manufacturing a semiconductor device, comprising the steps of: selectively forming a buried layer of a second conductivity type in a surface region of a semiconductor substrate of a first conductivity type; forming at least one insulating film on said semiconductor substrate; forming at least one first opening on said buried layer in said insulating film; forming a conductive layer in said first opening and connected to said buried layer of the second conductivity type; forming at least one second opening on said buried layer of said insulating film; forming a monocrystalline silicon layer of the second conductivity type in said second opening connected to said buried layer, said monocrystalline silicon layer being formed after forming said conductive layer; forming a region of the first conductivity type in said monocrystalline silicon layer; and selectively forming a region of the second conductivity type in the region of the first conductivity type.
Claim 3
Dependent Claim
57 words
A method according to claim 1, wherein the step of forming the conductive layer comprises the step of forming in said first opening a layer comprising a member selected from the group consisting of polycrystalline silicon in which an impurity of the second conductivity type is diffused, a high-melting metal, and a silicide of a high-melting metal.
Claim 4
Dependent Claim
41 words
A method according to claim 1, wherein the step of forming the conductive layer comprises the steps of: forming a polycrystalline silicon layer in said first opening; and doping an impurity of the second conductivity type into said polycrystalline silicon layer.
Claim 5
Dependent Claim
101 words
A method according to claim 1, further comprising the step of forming a conductive layer which is formed in the insulating film and into which an impurity of the first conductivity type is diffused, wherein the step of forming the second opening comprises extending said second opening through said conductive layer formed in said insulating film; and the step of forming the region of the first conductivity type in the monocrystalline silicon layer comprises diffusing an impurity of the first conductivity type into said monocrystalline silicon layer using as an impurity diffusion source said conductive layer formed in said insulating film.
Claim 6
Dependent Claim
82 words
A method according to claim 1, wherein the step of forming the conductive layer comprises the steps of: forming a conductive layer on said insulating film and in said first opening; forming a resist film on the conductive layer on said insulating film and in the first opening; and etching back an entire surface of the conductive layer and the resist film at substantially the same etching speed, leaving in said first opening a conductive layer virtually flush with said insulating film.
Claim 7
Dependent Claim
85 words
A method according to claim 1, wherein the step of forming the region of the first conductivity type in the monocrystalline silicon layer comprises forming a base of the first conductivity type in the monocrystalline silicon layer by annealing at a temperature less than 1,000° C., and forming the region of the second conductivity type in the region of the first conductivity type comprises selectively forming an emitter of the second conductivity type in the base by annealing at a temperature less than 1,000° C.
Claim 8
Independent Claim
187 words
A method of manufacturing a semiconductor device, comprising the steps of: selectively forming a buried layer of a second conductivity type in a surface region of a semiconductor substrate of a first conductivity type; forming at least one insulating film on the semiconductor substrate; forming at least one first opening on a portion of the buried layer in the insulating film; forming a collector connection layer of the second conductivity type in the first opening and connected to the buried layer; forming at least one second opening on the buried layer and in the insulating film; forming a monocrystalline silicon layer of the second conductivity type in the second opening and connected to the buried layer, said monocrystalline layer being formed after forming said collector connection layer; forming a base of the first conductivity type in the monocrystalline silicon layer by a heat treatment at a temperature of less than 1,000° C. and forming a collector in the remaining portion of the monocrystalline silicon layer; and selectively forming an emitter of the second conductivity type in the base by annealing at a temperature less than 1,000° C.
Claim 9
Independent Claim
187 words
A method of manufacturing a semiconductor device, comprising the steps of: selectively forming a buried layer of a second conductivity type in a surface region of a semiconductor substrate of a first conductivity type; forming at least one insulating film on the semiconductor substrate; forming at least one first opening on a portion of the buried layer in the insulating film; forming a collector connection layer of the second conductivity type in the first opening and connected to the buried layer; forming at least one second opening on the buried layer and in the insulating film; forming a monocrystalline silicon layer of the second conductivity type in the second opening and connected to the buried layer, said monocrystalline layer being formed after forming said collector connection layer; forming a base of the first conductivity type in the monocrystalline silicon layer by a heat treatment at a temperature of less than 1,000° C. and forming a collector in the remaining portion of the monocrystalline silicon layer; and selectively forming an emitter of the second conductivity type in the base by annealing at a temperature less than 1,000° C.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1990-11-30 | 1991-06-01 | 1991-12-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1994-11-30 | 1995-06-01 | 1995-12-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1998-11-30 | 1999-06-01 | 1999-12-01 | $7700.00 | Window Closed / Lapsed |