Doping for low capacitance amorphous silicon field effect transistor

Claim 1

An amorphous silicon thin film field effect transistor, particularly for use in liquid crystal display devices, said field effect transistor comprising: an insulative substrate; a gate electrode disposed on said insulative substrate; an insulative layer disposed over said gate electrode; an amorphous silicon layer disposed over said insulative layer, said amorphous silicon layer possessing a thickness t; a drain electrode disposed on said amorphous silicon layer so as to partially overlie said gate electrode; and a source electrode disposed on said amorphous silicon layer so as to define a channel region of length L in said amorphous silicon layer, said channel region extending in said amorphous silicon layer between said source electrode and said drain electrode, said source electrode overlying said gate electrode by a distance d; said distance d being given approximately by cμ e /(2Lα), where c is the gate capacitance per unit area, μ e is the effective electron mobility in the amorphous silicon layer and α is a constant of proportionality between current density and voltage in said amorphous silicon material and is between about 5 amperes/cm 2 /volt 2 and 50 ampere/cm 2 /volt 2 said α being determined by select dopant levels within said amorphous silicon.