Process for producing an insulating layer buried in a semiconductor substrate by ion implantation

Claim 2

A process for the production of a buried insulating layer in a semiconductor substrate in which the active zones of the active components of an integrated circuit have been defined, wherein it comprises the steps of: producing a mask on the substrate to define said active zones, said active zones being equal to or less than 5 μm wide; ion implanting oxygen or nitrogen in the substrate through the mask, whereby the masked area is protected from implant damage, the dose of said implantation being greater than or equal to 10 18 atoms/cm 2 ; and heating said substrate during implantation to form, by lateral dispersion and diffusion in said substrate of the implanted ions, a continuous insulating oxide or nitride layer buried in said substrate under said masked area as well as in the unmasked area.

Claim 3

A process according to claim 1, wherein following ion implantation the implanted substrate is annealed which, by lateral diffusion of the implanted ions, reinforces the continuity of the insulating oxide or nitride layer and, acting as seeds, the undamaged regions of the substrate, constituting the active zones, recrystallizes those parts of the substrate disturbed during ion implantation.

Claim 4

A process according to claim 1, wherein the active zones are 0.5 to 5 μm long.

Claim 5

A process according to claim 1, wherein ion implantation is performed with an ion beam with an energy varying between 200 and 1000 keV.

Claim 6

A process according to any one of the claims 1 to 4, wherein ion implantation is performed at a dose between 10 18 and 3.10 18 atoms/cm 2 .

Claim 7

A process for producing a buried insulating layer for producing an active component of an integrated circuit on an insulating support, wherein it comprises the steps of: producing an oxide layer on the substrate constituting the gate oxide of the component; depositing a conductive layer on the said oxide layer for producing the gate electrode of the component; depositing an insulating layer on the conductive layer; etching the insulating layer and then the conductive layer to produce the gate of the component, the width of said gate being less than or equal to 5 μm; ion implanting oxygen or nitrogen in the substrate, the dose of said implantation being greater than or equal to 10 18 atoms/cm 2 ; and heating said substrate during implantation to form, by lateral dispersion and diffusion into said substrate of the implanted ions, a continuous insulating oxide or nitride layer buried in said substrate, the etched conductive layer and the etched insulating layer acting as a mask during said implantation, said oxide or nitride layer being formed under said gate as well as in the unmasked area.

Claim 8

A process for producing a buried insulating layer for producing an active component of an integrated circuit on an insulating support, wherein it comprises the steps of: producing an oxide layer on the substrate constituting the gate oxide of the component; depositing a conductive layer on the said oxide layer for producing the gate electrode of the component; depositing an insulating layer on the conductive layer; etching the insulating layer and then the conductive layer to produce the gate of the component, the width of said gate being less than or equal to 5 μm; ion implanting oxygen or nitrogen in the substrate, the dose of said implantation being greater than or equal to 10 18 atoms/cm 2 ; and heating said substrate during implantation to form, by lateral dispersion and diffusion into said substrate of the implanted ions, a continuous insulating oxide or nitride layer buried in said substrate, the etched conductive layer and the etched insulating layer acting as a mask during said implantation, said oxide or nitride layer being formed under said gate as well as in the unmasked area.

Claim 9

A process according to claim 1 or claim 6, wherein the substrate is made from monocrystalline silicon.

Claim 10

A process according to claim 7, wherein the conductive layer is a polycrystalline silicon layer.

Claim 11

A process according to claim 7, wherein the insulating layer is a silicon oxide or silicon nitride layer.

Claim 12

A process according to claim 6, wherein following ion implantation the implanted substrate is annealed which, by lateral diffusion of the implanted ions, reinforces the continuity of the insulating oxide or nitride layer and, acting as seeds, the undamaged regions of the substrate, constituting the active zones, recrystalizes those parts of the substrate disturbed during ion implantation.

Claim 13

A process according to claim 2 or 10, wherein annealing is performed at a temperature of 1000° to 1200° C.

Claim 14

A process according to claim 6, wherein the gate is 0.5 to 5 μm long.