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US4703356A Expired / Lapsed US ⏱️ 0.0 years remaining

Television multiple frame store with cyclical repeat

Assignee: MERLIN ENGINEERING WORKS Inc
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Filing: 1986-03-07
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Granted: 1987-10-27
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Expires: 2006-03-07
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Abstract

Abstract A memory stores and repetitively plays back for display an continuously repeating, consecutive sequence of picture frames derived from a source. The memory includes an input for receiving digitized picture element values in a serial bit stream and for framing the stream into consecutive constant length pluralities of digital picture element words. A read/write solid state semiconductor frame memory array is arranged as a ring for storing and playing back a predetermined number of the consecutive video picture image frames. An output receives constant length pluralities of digital picture element words read from the memory array and converts them into an analog picture signal for display. A read/write memory array control controls writing to and reading from the frame memory array so that a selected segment of consecutive video picture frames may be repeatedly played back without interruption at a real time image display rate. The memory read/write memory array control may include a write protect circuit for enabling an operator to single step through a series of consecutive frames written in the array, the write protect circuit for generating and storing at least one write protection value for write protecting at least one of the frames so written. The read/write memory array control further may include a circuit for skipping said at least one write protected frame during subsequent write operations of the memory array and may also include a clear circuit for clearing the write protection value or values.

Inventors

  • 👤 William F. Herzog
  • 👤 William E. Nichols

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-04 05:20
CPC Classifications
H; H04; H04N; H04N1/00; H04N1/32; H04N1/32358; H04N5/00; H04N5/76; H04N5/91; H04N5/93

Claims Analysis

Total Claims: 12
Claim 1
Independent Claim 176 words
For inclusion in a video path including a source of television picture images and a display, a memory for storing and for repetitively playing back at the display a consecutive sequence of picture frames derived from the source, the memory comprising: input means for receiving said consecutive sequence of picture frames as digitized picture element values in a serial bit stream and for framing said stream into consecutive constant length pluralities of digital picture element words, read/write solid state semiconductor frame memory array means arranged as a ring for storing and playing back a predetermined number of said consecutive video picture image frames, output means for receiving constant length pluralities of digital picture element words read from said memory array means and for converting them into an analog picture signal for display on the display, read/write memory array control means for controlling writing to and reading from said frame memory array means so that a selected segment of said consecutive video picture frames may be repeatedly played back without interruption at real time image display rate.
Claim 2
Dependent Claim 176 words
For inclusion in a video path including a source of television picture images and a display, a memory for storing and for repetitively playing back at the display a consecutive sequence of picture frames derived from the source, the memory comprising: input means for receiving said consecutive sequence of picture frames as digitized picture element values in a serial bit stream and for framing said stream into consecutive constant length pluralities of digital picture element words, read/write solid state semiconductor frame memory array means arranged as a ring for storing and playing back a predetermined number of said consecutive video picture image frames, output means for receiving constant length pluralities of digital picture element words read from said memory array means and for converting them into an analog picture signal for display on the display, read/write memory array control means for controlling writing to and reading from said frame memory array means so that a selected segment of said consecutive video picture frames may be repeatedly played back without interruption at real time image display rate.
Claim 3
Dependent Claim 110 words
The memory set forth in claim 1 wherein said read/write memory array control means includes write protect means for enabling an operator to single step through a series of said consecutive frames written in the array means, said write protect means for generating and storing at least one write protection value for write protecting at least one of the said frames so written, said read/write memory array control means including means for skipping said at least one write protected frame during subsequent write operations of said memory array means, and further comprising clear means included in said memory array control means for clearing said at least one write protection value.
Claim 4
Dependent Claim 56 words
The memory set forth in claim 2 wherein said output means includes two independent output paths so that a single write protected frame may be put out for display on one display on one of the paths and a sequence of said consecutive frames may be put out for display on the other of the paths.
Claim 5
Dependent Claim 25 words
The memory set forth in claim 1 wherein said output means includes digital gamma correction means for varying the dynamic range of consecutive picture elements.
Claim 6
Dependent Claim 42 words
The memory set forth in claim 4 wherein the gamma correction means includes a plurality of table lookups contained in a read only lookup memory and selector means for selecting and processing one of the lookup tables to provide selected gamma correction.
Claim 7
Dependent Claim 36 words
The memory set forth in claim 1 including variable frame number selection means for varying the number of said consecutive picture frames to be stored during a single write loop through said ring memory array means.
Claim 8
Dependent Claim 25 words
The memory set forth in claim 6 wherein said variable frame number selection means includes means for receiving and processing external frame number selection information.
Claim 9
Dependent Claim 20 words
The memory set forth in claim 6 wherein said variable frame number selection means includes a manual frame number selector.
Claim 10
Dependent Claim 33 words
The memory set forth in claim 1 wherein said read/write memory array control means includes a manual write control for enabling initiation of writing of said consecutive frames into said memory array means.
Claim 11
Dependent Claim 48 words
The memory set forth in claim 1 wherein said read/write memory array control means includes a manual playback control for causing said memory array means to cease writing consecutive frames and for causing said memory array means to read out repetitively the consecutive picture frames then stored therein.
Claim 12
Dependent Claim 53 words
The memory set forth in claim 1 wherein said read/write memory array control means includes manual single step means for causing said memory array means to read out one of said consecutive picture frames the stored therein as selected by said single step means from the available ones of said stored picture frames.

References Cited (Backward Citations)

US4302776A Cited
US4602275A Cited
US4614196A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1990-10-26 1991-04-27 1991-10-27 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1994-10-26 1995-04-27 1995-10-27 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1998-10-26 1999-04-27 1999-10-27 $7700.00 Window Closed / Lapsed

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