US4703308A
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Apparatus and methods for digital-to-analogue conversion
Assignee: Texas Instruments Tucson Corp
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Filing: 1986-07-30
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Granted: 1987-10-27
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Expires: 2006-07-30
Abstract
Abstract In view of the limited speed times accuracy product of A-to-D and D-to-A converters, a required digital accuracy or sufficiently smooth analogue waveform cannot always be obtained. The present invention is useful in enhancing available converters. In the A-to-D version a stepped interpolation waveform obtained from a generator 13 is added to samples of an analogue waveform obtained from a sample-and-hold circuit 11 at a frequency 2f B (where f B is the bandwidth of the input signal). The resultant signal is applied to an n-bit A-to-D converter 15 operating at 2 m times 2f B and the converter output is averaged using an accumulator 16 reset at 2f B . The accumulator output is a higher accuracy signal since it has m+n bits. An analogous technique is described for D-to-A conversion.
Inventors
- 👤 R. Allan Belcher
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 18:24
CPC Classifications
H; H03; H03M; H03M1/00; H03M1/66; H03M1/12; H03M1/20; H03M1/202
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
204 words
A digital-to-analog conversion device comprising in combination: (a) means for holding values of an n-bit digital signal to be converted one at a time, successive values of the n-bit digital signal being substituted at a first frequency; (b) means for combining an output signal of the holding means with an interpolation signal that is periodic at a second frequency which is 2 m times the first frequency, the combining means including an n-bit counter producing an n-m bit output signal, and means for setting the counter to the current value of the n-bit digital signal at the first frequency and means for incrementing or decrementing the counter at the second frequency during each period of the first frequency so that there are 2 m times more values of the n-m bit output signal than of the n-bit digital signal; and (c) an n-m bit digital-to-analog converter coupled to the n-m bit output signal and operating in response to a control signal that is periodic at the second frequency to convert each of the values of the n-m bit output signal to a corresponding analog value to produce an analog output signal having 2 m analog values for each value of the n-bit digital signal.
Claim 2
Dependent Claim
204 words
A digital-to-analog conversion device comprising in combination: (a) means for holding values of an n-bit digital signal to be converted one at a time, successive values of the n-bit digital signal being substituted at a first frequency; (b) means for combining an output signal of the holding means with an interpolation signal that is periodic at a second frequency which is 2 m times the first frequency, the combining means including an n-bit counter producing an n-m bit output signal, and means for setting the counter to the current value of the n-bit digital signal at the first frequency and means for incrementing or decrementing the counter at the second frequency during each period of the first frequency so that there are 2 m times more values of the n-m bit output signal than of the n-bit digital signal; and (c) an n-m bit digital-to-analog converter coupled to the n-m bit output signal and operating in response to a control signal that is periodic at the second frequency to convert each of the values of the n-m bit output signal to a corresponding analog value to produce an analog output signal having 2 m analog values for each value of the n-bit digital signal.
Claim 3
Dependent Claim
15 words
The digital-to-analog conversion device of claim 1 including means for averaging the analog output signal.
Claim 4
Dependent Claim
33 words
The digital-to-analog conversion device of claim 2 wherein the analog output signal has a bandwidth f B , and the first frequency is at least 2f B and m is a positive integer.
Claim 5
Dependent Claim
22 words
The digital-to-analog conversion device of claim 3 wherein the n-m most significant bits of the counter are coupled to the digital-to-analog converter.
Claim 6
Dependent Claim
44 words
The digital-to-analog conversion device of claim 4 wherein the averaging means includes a transversal filter receiving the analog output signal, wherein the transversal filter has unitary gain coefficients and 2 m -1 delays each having a delay value of 1/(2 m f B ).
Claim 7
Dependent Claim
25 words
The digital-to-analog conversion device of claim 4 wherein the averaging means includes a low-pass filter having a cut-off frequency of at least f B .
Claim 8
Dependent Claim
75 words
The digital-to-analog conversion device of claim 2 wherein the counter produces a carry signal, the digital-to-analog conversion device including logic gating means for coupling bit levels of the n-m bit output signal to n-m input terminals, respectively, of the n-m bit digital-to-analog converter, the logic gating means including n-m OR gates each having an input terminal receiving the carry signal and an input terminal receiving a respective bit level of the n-m bit output signal.
Claim 9
Independent Claim
208 words
A method of converting a plurality of digital signals to an analog signal, the method comprising the steps of: (a) holding values of an n-bit digital signal to be converted one at a time in a holding means, and substituting successive values of the n-bit digital signal at a first frequency; (b) combining an n-bit output signal of the holding means with an interpolation signal that is periodic at a second frequency which is 2 m times the first frequency to produce an n-m bit output signal so that there are 2 m times more values of the n-m bit output signal than of the n-bit digital signal by supplying the n-bit output signal of the holding means to the inputs of an n-bit counter, setting the n-bit counter to the current values of the n-bit digital signal at the first frequency, and incrementing or decrementing the n-bit counter at the second frequency; and (c) coupling bit levels of the n-m bit output signal to n-m input terminals, respectively, of an n-m bit digital-to-analog converter and converting each of the values of the n-m bit output signal at the second frequency to 2 m analog values at 2 m equal intervals over the period of the first frequency.
Claim 10
Independent Claim
208 words
A method of converting a plurality of digital signals to an analog signal, the method comprising the steps of: (a) holding values of an n-bit digital signal to be converted one at a time in a holding means, and substituting successive values of the n-bit digital signal at a first frequency; (b) combining an n-bit output signal of the holding means with an interpolation signal that is periodic at a second frequency which is 2 m times the first frequency to produce an n-m bit output signal so that there are 2 m times more values of the n-m bit output signal than of the n-bit digital signal by supplying the n-bit output signal of the holding means to the inputs of an n-bit counter, setting the n-bit counter to the current values of the n-bit digital signal at the first frequency, and incrementing or decrementing the n-bit counter at the second frequency; and (c) coupling bit levels of the n-m bit output signal to n-m input terminals, respectively, of an n-m bit digital-to-analog converter and converting each of the values of the n-m bit output signal at the second frequency to 2 m analog values at 2 m equal intervals over the period of the first frequency.
Claim 11
Dependent Claim
18 words
The method of claim 8 including averaging the analog output signal produced by the n-m bit digital-to-analog converter.
Claim 12
Dependent Claim
55 words
The method of claim 9 wherein step (c) includes passing the n-m most significant bits of the counter to n-m input terminals, respectively, of the n-m bit digital-to-analog converter by means of n-m OR gates, one input terminal of each of the OR gates being connected to a carry output terminal of the n-bit counter.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1990-10-26 | 1991-04-27 | 1991-10-27 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1994-10-26 | 1995-04-27 | 1995-10-27 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1998-10-26 | 1999-04-27 | 1999-10-27 | $7700.00 | Window Closed / Lapsed |