← Back to Patent Explorer
US4701720A Expired / Lapsed US ⏱️ 0.0 years remaining

Capacitive feedback to boost amplifier slew rate

Assignee: National Semiconductor Corp
•
Filing: 1986-04-28
•
Granted: 1987-10-20
•
Expires: 2006-04-28
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract An integrated circuit voltage follower buffer amplifier is provided with a feedback capacitor that is coupled to produce positive feedback current that acts to enhance slew rate. In an op amp a polarity sensitive slew rate enhancement acts to correct slew rate asymmetry. Circuits are shown for avoiding assymetry or boosting slew rate of both polarities. In all cases, the positive feedback current is made proportional to the rate of change of the output voltage.

Inventors

  • 👤 Dennis M. Monticelli

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 18:35
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/30; H03F3/3069; H03F3/3076; H03F1/00; H03F1/02; H03F1/0205; H03F1/0261; H03F3/45; H03F3/45071; H03F3/45479

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 104 words
An integrated circuit amplifier having an input for receiving an input signal, and a single-ended output for reproducing said signal, said circuit comprising: an operational amplifier having inverting and noninverting inputs obtained by employing an input stage composed of a differentially connected pair of input transistors commonly operated by a current source which includes means for summing an additional current from a separate source; and a capacitor coupled between said single-ended output and said current source whereby a positive feedback current proportional to the time rate of change in potential at said output is coupled to said current source to provide said additional current.
Claim 2
Dependent Claim 104 words
An integrated circuit amplifier having an input for receiving an input signal, and a single-ended output for reproducing said signal, said circuit comprising: an operational amplifier having inverting and noninverting inputs obtained by employing an input stage composed of a differentially connected pair of input transistors commonly operated by a current source which includes means for summing an additional current from a separate source; and a capacitor coupled between said single-ended output and said current source whereby a positive feedback current proportional to the time rate of change in potential at said output is coupled to said current source to provide said additional current.
Claim 3
Dependent Claim 96 words
The circuit of claim 1 wherein said current source comprises a dual emitter transistor having its collector coupled to the emitters of said pair of input transistors, and its base coupled to a diode to create a current mirror in which the current flowing in said diode is mirrored in said collector of said dual emitter transistor, means for returning one emitter to one terminal of said diode and to a reference potential level, a resistor coupled between a second emitter and said reference potential level, and means for coupling said capacitor to said one emitter.
Claim 4
Dependent Claim 34 words
The circuit of claim 2 further comprising a clamping transistor having an emitter coupled to said one emitter, a base coupled to said second emitter, and a collector coupled to a reference potential terminal.
Claim 5
Dependent Claim 163 words
The circuit of claim 1 wherein said operational amplifier inverting input is coupled to said single-ended output so that said amplifier, when driven at its noninverting input, acts as a buffer, said current source comprising: a dual emitter transistor having its base coupled in a current-mirror configuration to a current supply and to a first diode and a first resistor coupled in series to conduct the current in said current supply; a second resistor coupled to conduct the current flowing in one emitter of said dual emitter transistor; a second diode coupled to conduct the current flowing in the other emitter of said dual emitter transistor and connected so that its current also flows in said first resistor; and means for coupling said feedback capacitor to said other emitter of said dual emitter transistor whereby said dual emitter transistor collector conducts a current equal to said current supply current plus the current flowing in said feedback capacitor due to a circuit driving signal.
Claim 6
Dependent Claim 58 words
The circuit of claim 4 further comprising a third diode coupled in series with said first diode, a fourth diode coupled in series with said one emitter of said dual emitter transistor, a third resistor coupled in series with said second diode and a fourth resistor coupled in series with said other emitter of said dual emitter transistor.
Claim 7
Dependent Claim 49 words
The circuit of claims 6 or 7 wherein said dual emitter transistor is composed of two individual transistors having their collectors connected together to function as a single collector, their bases connected together to function as a single base, and wherein their emitters are available separately as individual emitters.

References Cited (Backward Citations)

US4484147A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1990-10-19 1991-04-20 1991-10-20 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1994-10-19 1995-04-20 1995-10-20 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1998-10-19 1999-04-20 1999-10-20 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag