Analog signal processor

Claim 2

Apparatus for an analog signal processing system comprising: an analog input circuit having means for controllably selecting an incoming process signal or at least one reference voltage as an input voltage; means for sampling said input voltage to obtain a sampled value and for producing a digital signal equivalent to said sampled value; means for digitally filtering said sampled value to yield an actual filtered value of said process signal and a separate actual filtered value of said reference voltage; means, responsive to said actual filtered reference voltage value and to an expected value of said filtered reference voltage, for calculating at least one coefficient appearing in a pre-defined model of said analog input circuitry to determine an error component injected by said analog input circuitry and existing in the filtered value of said reference voltage; and means for compensating said actual filtered value of the process signal, in accordance with said model and using said calculated coefficient therein, to yield a calibrated value therefor.

Claim 3

The apparatus in claim 1 wherein said selecting means comprises means for controllably selecting between first and second reference voltages such that corresponding actual filtered values for said first and second reference voltages are generated by said calculating means.

Claim 4

The apparatus in claim 2 wherein said calculating means comprises means, responsive to said actual filtered values for said first and second reference voltages and to expected values therefor, for linearly estimating gain and bias values of said analog input circuit, wherein said gain value is estimated as the ratio of the difference between the actual filtered values for both of said reference voltages to the difference between the expected filtered values for both of said reference voltages, and said bias value is estimated as the actual filtered value of one of said reference voltages less that gain value times the expected filtered value for said one of the reference voltages.

Claim 5

The apparatus in claim 3 wherein said analog input circuit comprises means, connected between said selecting means and said sampling and producing means, for varying the gain and bias of said analog input circuit in response to difference between actual filtered values and expected values of said reference voltages produced by said analog input circuit to ensure that subsequently occurring reference voltages produced by said analog input circuit remain within pre-selected ranges.

Claim 6

The apparatus in claim 3 wherein said filtering means comprises means for forming an extended precision digital word in which input data to be processed by said filter occupies contiguous intermediate locations in said word thereby decreasing quantization noise generated during said filtering.

Claim 7

The apparatus in claim 3 further comprising means for testing each of said gain and bias values to verify the integrity of said system.

Claim 8

The apparatus in claim 6 wherein the sampling and producing means comprises means for sequentially selecting each one of a plurality of input voltages produced by a corresponding plurality of analog input circuits.

Claim 9

The apparatus in claim 7 wherein the sampling and producing means further comprises means for sequentially sampling all of the incoming process signals from all of said analog input circuits and one of said reference signals from a pre-selected sequential one of said analog input circuits.

Claim 10

The apparatus in claim 8 wherein said filtering means digitally filters a present value of said input voltage while said sampling and producing means generates the next successive digital value of said input voltage.

Claim 11

The apparatus in claim 9 wherein the magnitudes of the first and second reference voltages applied to said selecting means within any one of said analog input circuits are greater than a maximum expected value of and less than a minimum expected value, respectively, of said process signal applied as input to said one analog input circuit.

Claim 12

Apparatus for an analog signal processing system comprising: an analog input circuit having means for controllably selecting an incoming process signal, a first reference voltage or a second reference voltage as an input voltage; means for sampling said input voltage to obtain a sampled value and for producing a digital signal equivalent to said sampled value; means for digitally filtering said sampled value to yield an actual filtered value of said process signal and a separate actual filtered value of each of said first and second reference voltages; means, responsive to said actual filtered values for said first and second reference voltages and to expected values therefor, for linearly estimating gain and bias values of said analog input circuit, wherein said gain value is estimated as the ratio of the difference between the actual filtered values for both of said reference voltages to the difference between the expected filtered values for both of said reference voltages, and said bias value is estimated as the actual filtered value of one of said reference voltages less that gain value times the expected filtered value for said one of the reference voltages; and means for compensating the actual filtered value of the process signal, in accordance with a pre-defined relationship using said calculated gain and bias values, to yield a calibrated value for said process signal.

Claim 13

Apparatus for an analog signal processing system comprising: an analog input circuit having means for controllably selecting an incoming process signal, a first reference voltage or a second reference voltage as an input voltage; means for sampling said input voltage to obtain a sampled value and for producing a digital signal equivalent to said sampled value; means for digitally filtering said sampled value to yield an actual filtered value of said process signal and a separate actual filtered value of each of said first and second reference voltages; means, responsive to said actual filtered values for said first and second reference voltages and to expected values therefor, for linearly estimating gain and bias values of said analog input circuit, wherein said gain value is estimated as the ratio of the difference between the actual filtered values for both of said reference voltages to the difference between the expected filtered values for both of said reference voltages, and said bias value is estimated as the actual filtered value of one of said reference voltages less that gain value times the expected filtered value for said one of the reference voltages; and means for compensating the actual filtered value of the process signal, in accordance with a pre-defined relationship using said calculated gain and bias values, to yield a calibrated value for said process signal.

Claim 14

The apparatus in claim 11 wherein said analog input circuit comprises means, connected between said selecting means and said sampling and producing means, for varying the gain and bias of said analog input circuit in response to difference between actual filtered values and expected values of said reference voltages produced by said analog input circuit to ensure that subsequently occurring reference voltages produced by said analog input circuit remain within pre-selected ranges.

Claim 15

The apparatus in claim 11 wherein said filtering means comprises means for forming an extended precision digital word in which input data to be processed by said filter occupies contiguous intermediate locations in said word thereby decreasing quantization noise generated during said filtering.

Claim 16

The apparatus in claim 11 further comprising means for testing each of said gain and bias values to verify the integrity of said system.

Claim 17

The apparatus in claim 14 wherein the sampling and producing means comprises means for sequentially selecting each one of a plurality of input voltages produced by a corresponding plurality of analog input circuits.

Claim 18

The apparatus in claim 15 wherein the sampling and producing means further comprises means for sequentially sampling all of the incoming process signals from all of said analog input circuits and one of said reference signals from a pre-selected sequential one of said analog input circuits.

Claim 19

The apparatus in claim 16 wherein said filtering means digitally filters a present value of said input voltage while said sampling and producing means generates the next successive digital value of said input voltage.

Claim 20

The apparatus in claim 17 wherein the magnitudes of the first and second reference voltages applied to said selecting means within any one of said analog input circuits are greater than a maximum expected value of and less than a minimum expected value, respectively, of said process signal applied as input to said one analog input circuit.

Claim 23

The method in claim 19 wherein said selecting step comprises the step of controllably selecting between first and second reference voltages such that corresponding actual filtered values for said first and second reference voltages are generated by said calculating means.

Claim 24

The method in claim 20 wherein the calculating step includes the step of linearly estimating, in response said actual filtered values for said first and second reference voltages and to expected values therefor, gain and bias values of said analog input circuit, wherein said gain value is estimated as the ratio of the difference between the actual filtered values for both of said reference voltages to the difference between the expected filtered values for both of said reference voltages, and said bias value is estimated as the actual filtered value of one of said reference voltages less that gain value times the expected filtered value for said one of the reference voltages.

Claim 25

The method in claim 21 further comprising the step of: varying the gain and bias of said analog input circuit in response to differences between actual filtered values and expected values of said reference voltages produced by said analog input circuit to ensure that subsequently occurring reference voltages produced by said analog input circuit remain within pre-selected ranges.

Claim 26

The method in claim 21 wherein the filtering step comprises the step of forming an extended precision digital word in which input data to be processed by said filter occupies continguous intermediate locations in said word thereby decreasing quantization noise generated during said filtering.

Claim 27

The method in claim 21 further comprising the step of testing each of said gain and bias values to verify the integrity of said system.

Claim 28

The method in claim 24 wherein the sampling and producing step further comprises the step of sequentially selecting each one of a plurality of input voltages produced by a corresponding plurality of analog input circuits.

Claim 29

The method in claim 25 wherein the sampling and producing step further comprises the step of sequentially sampling all of the incoming process signals from all of said analog input circuits and one of said reference signals from a pre-selected sequential one of said analog input circuits.

Claim 30

The method in claim 26 wherein said filtering step further comprises the step of digitally filtering a present value of said input voltage while said sampling and producing step generates the next successive digital value of said input voltage.