Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
154 words
A semiconductor memory cell comprising: a plurality of memory cells for storing binary signals, a plurality of decoders connected to said memory cells for selecting said connected memory cells, said decoders including normal decoders and a spare decoder, precharge signal providing means connected respectively to said plurality of decoders for providing a precharge signal to each of said decoders, whereby said decoders are brought into a selective state, address signal providing means connected respectively to said decoders by a plurality of address signal lines for providing address signals for selecting specifically said decoders, link elements inserted between said respective decoders and said respective precharge signal providing means and interposed in said plurality of address signal lines for connecting said spare decoders and said address signal providing means, said link elements being caused to be melted so that an electrically insulated state is established to bring an associated circuit line into an electrically disconnected state.
Claim 2
Dependent Claim
154 words
A semiconductor memory cell comprising: a plurality of memory cells for storing binary signals, a plurality of decoders connected to said memory cells for selecting said connected memory cells, said decoders including normal decoders and a spare decoder, precharge signal providing means connected respectively to said plurality of decoders for providing a precharge signal to each of said decoders, whereby said decoders are brought into a selective state, address signal providing means connected respectively to said decoders by a plurality of address signal lines for providing address signals for selecting specifically said decoders, link elements inserted between said respective decoders and said respective precharge signal providing means and interposed in said plurality of address signal lines for connecting said spare decoders and said address signal providing means, said link elements being caused to be melted so that an electrically insulated state is established to bring an associated circuit line into an electrically disconnected state.
Claim 3
Dependent Claim
52 words
A semiconductor memory device in accordance with claim 1, wherein said decoders comprise output lines, said precharge signal providing means are connected to said output lines through one of said link elements, and said plurality of address signal lines included in said address signal providing means are connected to said output lines.
Claim 4
Dependent Claim
35 words
A semiconductor memory device in accordance with claim 2, further comprising: latching means connected to said output lines of said decoders for maintaining the output lines of the decoders not selected to a prescribed potential.
Claim 5
Dependent Claim
17 words
A semiconductor memory device in accordance with claim 3, wherein said latching means is a flip-flop circuit.
Claim 6
Dependent Claim
19 words
A semiconductor memory device in accordance with claim 1, wherein said semiconductor memory device is structured by field-effect devices.
Claim 7
Dependent Claim
20 words
A semiconductor memory device in accordance with claim 5, wherein said link elements can be melted by a laser beam.