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US4691328A Expired / Lapsed US ⏱️ 0.0 years remaining

On-line serial communication interface from a computer to a current loop

Assignee: Elsag International BV
•
Filing: 1985-08-12
•
Granted: 1987-09-01
•
Expires: 2005-08-12
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Abstract

Abstract An on-line serial communication interface is established from a digital circuit such as a computer or hand held terminal, to a current loop which has lines for connecting a transmitter to a power supply. The interface includes a diode which is connected in series with one of the lines of the current loop. The diode is connected in parallel to the source and drain of a FET. The control gate of the FET is connected to the output of a differential amplifier who receives as one of its inputs, a digital voltage pulse signal from the digital circuit. The other input of the amplifier is held at a selected voltage so that voltage pulses are output from the amplifier when the digital circuit generates its voltage pulses. This turns the FET on and off in synchronism with the voltage pulses, thus cutting the diode in and out of series with the line of the current loop. With the FET in its non-conducting off condition, the diode has a small voltage drop thereacross. This does not effect the current on the current loop. With the FET conducting and in its on state, the diode is cut out and its voltage drop is applied to the transmitter which is connected to the current loop. Communication can thus be established with the transmitter while again avoiding any interruption in the current on the current loop.

Inventors

  • 👤 Edward L. Sterling, Jr.
  • 👤 William L. Thompson

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 04:13
CPC Classifications
G; G06; G06F; G06F13/00; G08; G08C; G08C19/00; G08C19/02

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 188 words
An on-line serial communication interface for a digital circuit for generating voltage pulses, to a current loop having lines for connecting a transmitter to a power supply to drain current from the power supply according to a process variable sensed by the transmitter, comprising: a diode connected in series in one of the lines of the current loop for establishing a voltage drop on the diode; an FET having a source and drain connected in parallel with the diode, said FET having a gate for receiving a voltage to render said FET conductive between its source and drain to short out said diode from applying its voltage drop to the one line; and a differential amplifier having an output connected to said FET gate, and two inputs, one of said inputs of said amplifier connected to the digital circuit for receiving the generated voltage pulses and the other input of said amplifier being connected to a selected voltage whereby said amplifier output receives voltage pulses synchronized with the generated voltage pulses from said digital circuit to render said FET conductive and non-conductive in synchronism with the voltage pulses.
Claim 2
Dependent Claim 188 words
An on-line serial communication interface for a digital circuit for generating voltage pulses, to a current loop having lines for connecting a transmitter to a power supply to drain current from the power supply according to a process variable sensed by the transmitter, comprising: a diode connected in series in one of the lines of the current loop for establishing a voltage drop on the diode; an FET having a source and drain connected in parallel with the diode, said FET having a gate for receiving a voltage to render said FET conductive between its source and drain to short out said diode from applying its voltage drop to the one line; and a differential amplifier having an output connected to said FET gate, and two inputs, one of said inputs of said amplifier connected to the digital circuit for receiving the generated voltage pulses and the other input of said amplifier being connected to a selected voltage whereby said amplifier output receives voltage pulses synchronized with the generated voltage pulses from said digital circuit to render said FET conductive and non-conductive in synchronism with the voltage pulses.
Claim 3
Dependent Claim 13 words
An interface according to claim 1, wherein said digital circuit comprises a computer.
Claim 4
Dependent Claim 15 words
An interface according to claim 1, wherein said digital circuit comprises a hand held terminal.
Claim 5
Dependent Claim 46 words
An interface according to claim 1, wherein said current loop has a first line for connecting positive terminals of the transmitter and power supply and a second line for connecting negative terminals of the transmitter and power supply, said diode being connected in said negative line.
Claim 6
Dependent Claim 35 words
An interface according to claim 1, including a voltage divider connected between said selected voltage and said other input of said amplifier for applying a small positive potential to said one input of said amplifier.
Claim 7
Dependent Claim 23 words
As interface according to claim 5, wherein said digital circuit comprises a communicating device which generates positive voltage pulses when it is active.

References Cited (Backward Citations)

US4057793A Cited
US4272758A Cited
US4520488A Cited
US4504959A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1990-08-31 1991-03-02 1991-09-01 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1994-08-31 1995-03-02 1995-09-01 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1998-08-31 1999-03-02 1999-09-01 $7700.00 Window Closed / Lapsed

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