US4689872A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of manufacturing a semiconductor device
Assignee: US Philips Corp
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Filing: 1985-09-03
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Granted: 1987-09-01
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Expires: 2005-09-03
Abstract
Abstract For providing semiconductor zones (16, 18, 26) and contact metallization (19, 27) within an opening (9) in a self-registered manner, which opening is provided along its edge with polycrystalline connection parts (10) separated by an insulating material (15) from the metallization (19, 27), a protective layer (11) is formed which is maintained within the opening (9)until within this opening (9) the connection parts (10) are formed by anisotropic etching from a uniform layer of polycrystalline semiconductor material (10). The method is suitable for the manufacture of both bipolar transistors and field effect transistors.
Inventors
- 👤 Johannes A. Appels
- 👤 Henricus G. R. Maas
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 22:42
CPC Classifications
H; H10; H10D; H10D10/00; H10D10/01; H10D10/051; H10P; H10P32/00; H10P32/10; H10P32/14; H10P32/1408; H10P32/1414; H10P32/17; H10P32/171; H10P76/00; H10P76/40; H10P76/408; H10P76/4085; H10W; H10W20/00; H10W20/40; H10W20/41; H10W20/44; H10W20/4451; Y; Y10; Y10S; Y10S148/00; Y10S148/011; Y10S148/051; Y10S148/103; Y10S438/00; Y10S438/911
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
174 words
A method of manufacturing a semiconductor device comprising the steps of forming an insulating layer on a surface of a semiconductor body, said insulating layer having an opening to said surface; providing a substantially uniform layer of a first semiconductor material over said insulating layer and said surface in said opening; covering said first semiconductor material with a substantially uniform layer of an oxidation preventing material; selectively removing portions of said oxidation preventing layer, said portions being free of said opening; oxidizing exposed portions of said first semiconductor material over a part of the thickness of said first semiconductor material; removing remaining portions of said oxidation preventing layer in said opening; anisotropically etching at least parts of said first semiconductor material in said opening, said first semiconductor material remaining along edges of said opening; oxidizing said first semiconductor material remaining along said edges of said opening to form a mask; and exposing said surface of said semiconductor body in said opening to semiconductor ions through said mask to form portions of a semiconductor device.
Claim 2
Independent Claim
174 words
A method of manufacturing a semiconductor device comprising the steps of forming an insulating layer on a surface of a semiconductor body, said insulating layer having an opening to said surface; providing a substantially uniform layer of a first semiconductor material over said insulating layer and said surface in said opening; covering said first semiconductor material with a substantially uniform layer of an oxidation preventing material; selectively removing portions of said oxidation preventing layer, said portions being free of said opening; oxidizing exposed portions of said first semiconductor material over a part of the thickness of said first semiconductor material; removing remaining portions of said oxidation preventing layer in said opening; anisotropically etching at least parts of said first semiconductor material in said opening, said first semiconductor material remaining along edges of said opening; oxidizing said first semiconductor material remaining along said edges of said opening to form a mask; and exposing said surface of said semiconductor body in said opening to semiconductor ions through said mask to form portions of a semiconductor device.
Claim 3
Dependent Claim
27 words
A method according to claim 1, wherein said semiconductor ions provide both base zone doping and emitter zone doping through said mask to form a bipolar transistor.
Claim 4
Dependent Claim
56 words
A method according to claim 1, wherein said surface of said semiconductor body within said opening is covered with a thin layer of field oxide before providing said first semiconductor material, and said semiconductor ions provide source zone doping to form a field effect transistor after removing a part of said thin layer in said opening.
Claim 5
Dependent Claim
27 words
A method according to claim 1 or claim 2 or claim 3, wherein said anisotropic etching of said first semiconductor material is carried out by a plasma.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1990-08-31 | 1991-03-02 | 1991-09-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1994-08-31 | 1995-03-02 | 1995-09-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1998-08-31 | 1999-03-02 | 1999-09-01 | $7700.00 | Window Closed / Lapsed |