Error recovery method and apparatus

Claim 2

An error recovery apparatus in a data processing system comprising: a peripheral unit for storing data in a plurality of data blocks, each of said data blocks having a unique address; a memory for storing a first channel command word (CCW) chain, said memory having storage areas for storing data transferred from said peripheral unit; a controller connected between said memory and said peripheral unit for reading said data blocks from said peripheral unit and transferring said data blocks to said memory to store said data blocks in said storage areas determined by said first CCW chain, said controller having detecting means to detect an uncorrectable error in the transfer of the second or subsequent data block of said plurality of data blocks, and; processing means connected to said controller for generating a new CCW chain when an uncorrectable error occurs in a second or subsequent data block of said plurality of data blocks.

Claim 3

An error recovery apparatus in a data processing system comprising: a peripheral unit for storing data in a plurality of data blocks, each of said data blocks having an address; a memory for storing a first channel command word (CCW) chain, said memory having storage areas for storing data transferred from said peripheral unit; a controller connected between said memory and said peripheral unit for reading said data blocks from said peripheral unit and transferring said data blocks to said memory to store said data blocks in said storage areas determined by said first CCW chain, said controller having detecting means to detect an uncorrectable error in the transfer of the second or subsequent data block of said plurality of data blocks; a first register connected to said controller for storing the total number of data units in all data blocks successfully transferred to said memory; a second register connected to said controller for storing the address of the data block currently being transferred from said peripheral units to said memory; and processing means connected to said controller for generating a new CCW chain when an uncorrectable error occurs in a second or subsequent data block of said plurality of data blocks, said new CCW chain generated by said processing means by considering the contents of said first register, the contents of said second register, and said first CCW chain.

Claim 4

An error recovery apparatus in a data processing system comprising: a peripheral unit for storing data in a plurality of data blocks, each of said data blocks having an address; a memory for storing a first channel command word (CCW) chain, said memory having storage areas for storing data transferred from said peripheral unit; a controller connected between said memory and said peripheral unit for reading said data blocks from said peripheral unit and transferring said data blocks to said memory to store said data blocks in said storage areas determined by said first CCW chain, said controller having detecting means to detect an uncorrectable error in the transfer of the second or subsequent data block of said plurality of data blocks; a first register connected to said controller for storing the total number of data units in all data blocks successfully transferred to said memory; a second register connected to said controller for storing the address of the data block currently being transferred from said peripheral units to said memory; and processing means connected to said controller for generating a new CCW chain when an uncorrectable error occurs in a second or subsequent data block of said plurality of data blocks, said new CCW chain generated by said processing means by considering the contents of said first register, the contents of said second register, and said first CCW chain.

Claim 5

The error recovery apparatus according to claim 2 wherein said detecting means comprises: flag means for indicating whether data in one of said blocks currently being read from said peripheral unit for storing in said memory is a first data block or a second or subsequent data block, and further, wherein said processing means recognizes the block in which said uncorrectable error occurs.

Claim 6

The error recovery apparatus according to claim 2, wherein said peripheral unit is a magnetic disc unit and wherein each said block is defined as a record having a unique ID portion indicating the address thereof and a data portion in which to record data.

Claim 7

The error recovery apparatus according to claim 2, wherein said first register comprises: counter means for counting the number of data units transferred from said peripheral unit to said memory, said first register storing the total number of data units from a plurality of records counted by said counter means.

Claim 8

An error recovery method for a data processing system that includes a peripheral unit to store data in a plurality of data blocks each having a unique address, a memory for storing a first channel command word (CCW) chain and having storage areas to store said data blocks, and a controller for transferring a plurality of data blocks between said peripheral units and said memory comprising: reading said plurality of data blocks from the peripheral units according to said first CCW chain; writing said plurality of data blocks to said memory under the control of said first CCW chain; detecting uncorrectable errors in the said data read from said peripheral unit; counting the total number of data units in each of said data blocks correctly written in said storage area of said memory; retaining the address of the data block currently read from the peripheral unit; stopping said counting and said retaining when an uncorrectable error is detected; generating, in response to the detection of an uncorrectable error, a second CCW chain determined by said first CCW chain, the total number of data units correctly written, and the address of the last correctly transferred data block; reading the data blocks subsequent to the last correctly transferred data block under the control of said second CCW chain; and writing said subsequent data blocks into said memory under the control of said second CCW chain.

Claim 9

An error recovery method for a data processing system that includes a peripheral unit to store data in a plurality of data blocks each having a unique address, a memory for storing a first channel command word (CCW) chain and having storage areas to store said data blocks, and a controller for transferring a plurality of data blocks between said peripheral units and said memory comprising: reading said plurality of data blocks from the peripheral units according to said first CCW chain; writing said plurality of data blocks to said memory under the control of said first CCW chain; detecting uncorrectable errors in the said data read from said peripheral unit; counting the total number of data units in each of said data blocks correctly written in said storage area of said memory; retaining the address of the data block currently read from the peripheral unit; stopping said counting and said retaining when an uncorrectable error is detected; generating, in response to the detection of an uncorrectable error, a second CCW chain determined by said first CCW chain, the total number of data units correctly written, and the address of the last correctly transferred data block; reading the data blocks subsequent to the last correctly transferred data block under the control of said second CCW chain; and writing said subsequent data blocks into said memory under the control of said second CCW chain.

Claim 10

The error recovery method according to claim 6 wherein said step of detecting further comprises: indicating whether said data block currently being read from said peripheral unit is a first data block or a second or subsequent data block, and wherein said generating step further comprises generating a second CCW chain only when said data block currently being read is a second or subsequent data block.

Claim 11

The error recovery method according to claim 6 wherein said first reading step reads data from each data block, each data block having an ID portion indicating the address of said data block and a data portion in which to record data, and wherein said retaining step retains the ID portion of said data block.

Claim 12

The error recovery method according to claim 7 further comprising, after said indicating step, re-reading data in said first data block using said first CCW chain when errors occur in said first step.

Claim 13

The error recovery method according to claim 6 further comprising: storing temporarily said second CCW chain in the memory after generating said second CCW chain.

Claim 16

The data transfer method according to claim 11 wherein said detecting step further comprises: checking for the presence of errors in a plurality of data records transferred under the control of a single command; recognizing whether uncorrectable errors occur in any said record of said plurality of records; and indicating whether the recognized uncorrectable error occurs in the first record of said plurality of records or in a second or subsequent record of said plurality of records.

Claim 17

The data transfer method according to claim 11, further comprising, after the step of producing said second CCW chain: storing temporarily said second CCW chain in said memory.

Claim 18

The data transfer method according to claim 11, further including, after said detecting step, the step of: re-reading data in said first record under the control of said first CCW chain when an uncorrectable error occurs in said first record.