← Back to Patent Explorer
US4686426A Expired / Lapsed US ⏱️ 0.0 years remaining

Thin-film EL display panel drive circuit with voltage compensation

Assignee: Sharp Corp
•
Filing: 1985-09-26
•
Granted: 1987-08-11
•
Expires: 2005-09-26
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A thin-film EL display panel drive circuit capable of varying the drive voltage according to changes in the number of emitting picture elements.

Inventors

  • 👤 Yoshihide Fujioka
  • 👤 Shigeyuki Harada
  • 👤 Toshihiro Ohba
  • 👤 Yoshiharu Kanatani
  • 👤 Hisashi Uede

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-08 05:53
CPC Classifications
G; G09; G09G; G09G3/00; G09G3/20; G09G3/22; G09G3/30; G09G2310/00; G09G2310/02; G09G2310/0264; G09G2310/0267; G09G2310/0275

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 144 words
A thin-film EL display panel drive circuit comprising: driving voltage means for providing a driving voltage to said EL display panel; N-channel MOS transistors connected to scan side electrodes; P-channel MOS transistors oonnected to scan side electrodes and said driving voltage means; first activating means for activating means for activating said N-channel MOS transistors to apply write pulses to picture elements on said scan side electrodes to which said N-channel MOS transistors are connected; second activating means for activating said P-channel MOS transistors to apply write pulses to picture elements on said scan side electrodes to which said P-channel MOS transistors are connected; voltage compensating means for compensating for voltage drops in said P-channel MOS transistors by adding voltage to said driving voltage supplied by said driving voltage means, said compensation being determined in accordance with variations in the number of emitting picture elements.
Claim 2
Dependent Claim 144 words
A thin-film EL display panel drive circuit comprising: driving voltage means for providing a driving voltage to said EL display panel; N-channel MOS transistors connected to scan side electrodes; P-channel MOS transistors oonnected to scan side electrodes and said driving voltage means; first activating means for activating means for activating said N-channel MOS transistors to apply write pulses to picture elements on said scan side electrodes to which said N-channel MOS transistors are connected; second activating means for activating said P-channel MOS transistors to apply write pulses to picture elements on said scan side electrodes to which said P-channel MOS transistors are connected; voltage compensating means for compensating for voltage drops in said P-channel MOS transistors by adding voltage to said driving voltage supplied by said driving voltage means, said compensation being determined in accordance with variations in the number of emitting picture elements.
Claim 3
Dependent Claim 25 words
The thin-film EL display panel drive circuit of claim 1, wherein said P-channel MOS transistors and said N-channel MOS transistors are alternately activated or deactivated.
Claim 4
Dependent Claim 32 words
The thin-film EL display panel drive circuit of claim 2, wherein said voltage for compensating the voltage drop is stored in said driving voltage means while said N-channel MOS transistors are activated.
Claim 5
Dependent Claim 33 words
The thin-film EL display panel drive circuit of claim 2, wherein said compensating voltage is added to the drive voltage supplied by said driving voltage means when said P-channel MOS transistors are activated.
Claim 6
Dependent Claim 518 words
A drive system for a thin-film electroluminescent (EL) matrix display panel comprising: data side electrodes formed on one major surface of the thin-film electroluminescent (EL) matrix display panel and generally extending in a first direction; scanning side electrodes formed on the opposing major surface of said thin-film electroluminescent (EL) matrix display panel in a second direction substantialiy perpendicular to said first direction, said scanning side electrodes being alternately divided into odd number scanning electrodes and even number scanning electrodes; a pull-up charge driving circuit; a precharge driving circuit; a write driving circuit for providing first and second write pulses; a source level switching circuit; an odd side N-channel high voltage MOS driver connected to said odd number scanning electrodes at one end thereof, the other end of said odd side N-channel high voltage MOS driver being connected to said source level switching circuit; an odd side P-channel high voltage MOS driver connected to said odd number scanning electrodes at one end thereof, the other end of said odd side P-channel high voltage MOS driver being connected to said pull-up charge driving circuit and said write driving circuit; an even side N-channel high voltage MOS driver connected to said even number scanning electrodes at one end thereof, the other end of said even side N-channel high voltage MOS driver being connected to said source level switching circuit; an even side P-channel high voltage MOS driver connected to said even number scanning electrodes at one end thereof, the other end of said even side P-channel high voltage MOS driver being connected to said pull-up charge driving circuit and said write driving circuit; and a data side N-channel high voltage MOS driver connected to said data side electrodes at one end thereof, the other end of said data side N-channel high voltage MOS driver being connected to said precharge driving circuit; said MOS drivers collectively driving said data side electrodes add said scanning side electrodes to define a number of emitting elements; detecting means for detecting the number of emitting elements for each scan side emitting line in a first driving period; voltage compensating means connected to said write driving circuit for compensating for voltage drops in said odd and even side P-channel high voltage MOS drivers by adding a voltage in a second driving period to said second write pulse based upon the variations in the number of emitting elements detected in said first driving period; said odd side P-channel MOS driver providing said first write pulse to said odd number scanning electrodes when an even number scanning electrode is selected in said first driving period and providing said second write pulse to a selected odd number scanning electrode when in said second driving period; said even-side P-channel MOS driver providing said first write pulse to said even number scanning electrodes when an odd number scanning electrode is selected in said first driving period and providing said second write pulse to a selected even number scanning electrode in said second driving period; said first write pulse provided being of a polarity opposite to said second write pulse which is provided.
Claim 7
Dependent Claim 518 words
A drive system for a thin-film electroluminescent (EL) matrix display panel comprising: data side electrodes formed on one major surface of the thin-film electroluminescent (EL) matrix display panel and generally extending in a first direction; scanning side electrodes formed on the opposing major surface of said thin-film electroluminescent (EL) matrix display panel in a second direction substantialiy perpendicular to said first direction, said scanning side electrodes being alternately divided into odd number scanning electrodes and even number scanning electrodes; a pull-up charge driving circuit; a precharge driving circuit; a write driving circuit for providing first and second write pulses; a source level switching circuit; an odd side N-channel high voltage MOS driver connected to said odd number scanning electrodes at one end thereof, the other end of said odd side N-channel high voltage MOS driver being connected to said source level switching circuit; an odd side P-channel high voltage MOS driver connected to said odd number scanning electrodes at one end thereof, the other end of said odd side P-channel high voltage MOS driver being connected to said pull-up charge driving circuit and said write driving circuit; an even side N-channel high voltage MOS driver connected to said even number scanning electrodes at one end thereof, the other end of said even side N-channel high voltage MOS driver being connected to said source level switching circuit; an even side P-channel high voltage MOS driver connected to said even number scanning electrodes at one end thereof, the other end of said even side P-channel high voltage MOS driver being connected to said pull-up charge driving circuit and said write driving circuit; and a data side N-channel high voltage MOS driver connected to said data side electrodes at one end thereof, the other end of said data side N-channel high voltage MOS driver being connected to said precharge driving circuit; said MOS drivers collectively driving said data side electrodes add said scanning side electrodes to define a number of emitting elements; detecting means for detecting the number of emitting elements for each scan side emitting line in a first driving period; voltage compensating means connected to said write driving circuit for compensating for voltage drops in said odd and even side P-channel high voltage MOS drivers by adding a voltage in a second driving period to said second write pulse based upon the variations in the number of emitting elements detected in said first driving period; said odd side P-channel MOS driver providing said first write pulse to said odd number scanning electrodes when an even number scanning electrode is selected in said first driving period and providing said second write pulse to a selected odd number scanning electrode when in said second driving period; said even-side P-channel MOS driver providing said first write pulse to said even number scanning electrodes when an odd number scanning electrode is selected in said first driving period and providing said second write pulse to a selected even number scanning electrode in said second driving period; said first write pulse provided being of a polarity opposite to said second write pulse which is provided.
Claim 8
Dependent Claim 41 words
The thin-film EL display panel drive circuit of claim 1 wherein said compensating means adds a compensating voltage to said driving voltage supplied by said driving voltage means so as to apply a substantially constant voltage to said scan side electrodes.

References Cited (Backward Citations)

US3885196A Cited
US4032818A Cited
US4338598A Cited
US4485379A Cited
GB2149182A Cited
DE3511886A1 Cited
GB2158982A Cited
GB2161306A Cited
GB2165078A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1990-08-10 1991-02-09 1991-08-11 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1994-08-10 1995-02-09 1995-08-11 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1998-08-10 1999-02-09 1999-08-11 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag