US4684934A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method and apparatus for storing and retrieving keyboard LED data
Assignee: EMC Corp
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Filing: 1983-02-28
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Granted: 1987-08-04
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Expires: 2003-02-28
Abstract
Abstract An apparatus and method for storing and retrieving information indicative of the state of a plurality of keyboard LED's is disclosed. A RAM is employed to store the current status of all keyboard LED's. Programmed array logic cyclically generates RAM addresses to cause RAM data to be supplied to an LED array. The RAM addresses are also supplied to a decoder to generate additional LED array activation signals. LED's which are activated by both a RAM data output and a decoder output are illuminated. Each RAM address affects a different subset of the keyboard LED's. The programmed array logic generates each RAM address several times per second such that the LED's which are activated appear to be constantly on. Apparatus is also disclosed to update the data stored in the RAM.
Inventors
- 👤 Larry A. Small
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 09:07
CPC Classifications
G; G06; G06F; G06F3/00; G06F3/01; G06F3/02; G06F3/023
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
312 words
Apparatus for controlling a plurality of indicators on a keyboard operatively connected to a terminal, said keyboard having a plurality of keys, means for sensing the status of each of said keys and means for providing key status information to said terminal and said terminal having means, responsive to said key status information, for generating on/off status information for said indicators and means for providing said on/off status information to said keyboard apparatus, said keyboard apparatus comprising: clock means for generating at least one timing signal, said signal having evenly spaced timing pulses; logic means responsive to said timing signal for providing an address selected from a plurality of addresses, said provided address changing in response to said timing pulses such that each of said plurality of addresses is repetitively cyclically provided by said logic means; memory means having a plurality of memory output lines and having a plurality of storage locations for retaining said information descriptive of the on/off status of each of said indicators, said memory means being responsive to said provided address for providing portions of said status information at said memory output lines in response to said provided address, each said memory output line being provided as an activation input to a portion of said indicators; decoder means responsive to said provided address, said decoder means having a plurality of individually activatable output lines, each said decoder output line being provided as an enabling input to a portion of said indicators; activation means responsive to the outputs of said memory means and said decoder means for controlling the on/off status of said indicators, said decoder outputs and memory outputs being connected to activate only a portion of said indicators at a time such that each indicator may be controlled independently; and means, connected to said on/off status information providing means, for revising the information in said memory means.
Claim 2
Dependent Claim
312 words
Apparatus for controlling a plurality of indicators on a keyboard operatively connected to a terminal, said keyboard having a plurality of keys, means for sensing the status of each of said keys and means for providing key status information to said terminal and said terminal having means, responsive to said key status information, for generating on/off status information for said indicators and means for providing said on/off status information to said keyboard apparatus, said keyboard apparatus comprising: clock means for generating at least one timing signal, said signal having evenly spaced timing pulses; logic means responsive to said timing signal for providing an address selected from a plurality of addresses, said provided address changing in response to said timing pulses such that each of said plurality of addresses is repetitively cyclically provided by said logic means; memory means having a plurality of memory output lines and having a plurality of storage locations for retaining said information descriptive of the on/off status of each of said indicators, said memory means being responsive to said provided address for providing portions of said status information at said memory output lines in response to said provided address, each said memory output line being provided as an activation input to a portion of said indicators; decoder means responsive to said provided address, said decoder means having a plurality of individually activatable output lines, each said decoder output line being provided as an enabling input to a portion of said indicators; activation means responsive to the outputs of said memory means and said decoder means for controlling the on/off status of said indicators, said decoder outputs and memory outputs being connected to activate only a portion of said indicators at a time such that each indicator may be controlled independently; and means, connected to said on/off status information providing means, for revising the information in said memory means.
Claim 3
Dependent Claim
107 words
The apparatus of claim 1 wherein said revising means comprises: means for providing an interrupt to said logic means such that the cyclical providing of addresses by said logic means is suspended when indicator status data is available for storage in said memory means; means for providing indicator status data bits and an address where said bits are to be stored to said memory means; means for causing said indicator status data to be stored in said memory means at said address; and means for removing said interrupt when the storing operation is completed such that the cyclical providing of addresses by said logic means in reinitiated.
Claim 4
Dependent Claim
199 words
In a keyboard including a plurality of indicators; a source of clock pulses; address generation logic responsive to said clock pulses; a memory for retaining information descriptive of the on/off status of each of said indicators, said memory being responsive to the address from said address generation logic for providing the portion of said descriptive information stored at said address; a decoder having a plurality of individually activatable output lines, said decoder activating a selected one of said output lines in response to the address from said address generator logic; and indicator activation logic connected to the output of said memory and said decoder for controlling the on/off status of said indicators, a method of controlling said plurality of indicators comprising the steps of: (a) generating an address corresponding to one of the storage locations in said memory containing indicator information, said generation to occur such that the addresses of all storage locations containing indicator information are cyclically generated; (b) providing the address to said memory and said decoder; (c) enabling said decoder; (d) providing the outputs of said memory and said decoder to said indicator activation logic; (e) disabling said decoder; (f) repeating (a)-(e) at each clock pulse.
Claim 5
Dependent Claim
199 words
In a keyboard including a plurality of indicators; a source of clock pulses; address generation logic responsive to said clock pulses; a memory for retaining information descriptive of the on/off status of each of said indicators, said memory being responsive to the address from said address generation logic for providing the portion of said descriptive information stored at said address; a decoder having a plurality of individually activatable output lines, said decoder activating a selected one of said output lines in response to the address from said address generator logic; and indicator activation logic connected to the output of said memory and said decoder for controlling the on/off status of said indicators, a method of controlling said plurality of indicators comprising the steps of: (a) generating an address corresponding to one of the storage locations in said memory containing indicator information, said generation to occur such that the addresses of all storage locations containing indicator information are cyclically generated; (b) providing the address to said memory and said decoder; (c) enabling said decoder; (d) providing the outputs of said memory and said decoder to said indicator activation logic; (e) disabling said decoder; (f) repeating (a)-(e) at each clock pulse.
Claim 6
Dependent Claim
173 words
In a keyboard including a plurality of indicators; a source of clock pulses; address generation logic responsive to said clock pulses; a memory for retaining information descriptive of the on/off status of each of said indicators, said memory being responsive to the address from said address generation logic for providing the portion of said descriptive information stored at said address; a decoder having a plurality of individually activatable output lines, said decoder activating a selected one of said output lines in response to the address from said address generator logic; and indicator activation logic connected to the output of said memory and said decoder for controlling the on/off status of said indicators, a method of controlling said plurality of indicators comprising the steps of: (a) generating an address corresponding to one of the storage locations in said memory; (b) supplying said address to the inputs of said memory and said decoder; (c) supplying the outputs of said memory and said decoder to said indicator activation logic; (d) repeating (a)-(c) at each clock pulse.
Claim 7
Dependent Claim
173 words
In a keyboard including a plurality of indicators; a source of clock pulses; address generation logic responsive to said clock pulses; a memory for retaining information descriptive of the on/off status of each of said indicators, said memory being responsive to the address from said address generation logic for providing the portion of said descriptive information stored at said address; a decoder having a plurality of individually activatable output lines, said decoder activating a selected one of said output lines in response to the address from said address generator logic; and indicator activation logic connected to the output of said memory and said decoder for controlling the on/off status of said indicators, a method of controlling said plurality of indicators comprising the steps of: (a) generating an address corresponding to one of the storage locations in said memory; (b) supplying said address to the inputs of said memory and said decoder; (c) supplying the outputs of said memory and said decoder to said indicator activation logic; (d) repeating (a)-(c) at each clock pulse.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1990-08-03 | 1991-02-02 | 1991-08-04 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1994-08-03 | 1995-02-02 | 1995-08-04 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1998-08-03 | 1999-02-02 | 1999-08-04 | $7700.00 | Window Closed / Lapsed |