US4682122A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Frequency synthesizer stage adding high frequency steps to an initial frequency
Assignee: Adret Electronique SA
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Filing: 1985-10-15
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Granted: 1987-07-21
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Expires: 2005-10-15
Abstract
Abstract A frequency synthesizer for adding large frequency steps to an initial frequency. A first phase lock loop divides the input frequency Fo+Δ(Δ being the sum of smaller frequency steps) by a rational division factor and adds to the result a standard frequency P in a fixed integral ratio with the large frequency steps to form an intermediate frequency Fi. A second phase lock loop (O S -E-G-D 3 -CPF 2 -FL 3 ) multiplies the intermediate frequency by a rational factor, equal to (N+1)/D. This second loop first divides (in D 3 ) the intermediate frequency by an integral fixed ratio D and then compares (in CPF 2 ) the result Fi/D to a beat between the output frequency Fs and a harmonic N-Fi of the intermediate frequency.
Inventors
- 👤 Joel Remy
- 👤 Roger Charbonnier
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 11:31
CPC Classifications
H; H03; H03L; H03L7/00; H03L7/06; H03L7/16; H03L7/22; H03L7/23
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
165 words
A frequency synthesizer for generating an output frequency Fs by adding large frequency steps to a frequency itself comprising smaller frequency steps and comprising first and second circuits, each of said circuits including at least one current or voltage controlled oscillator controlled by a phase lock loop, the first circuit dividing, by means of a programmable divider, the input frequency Fo+Δ (Δbeing the sum of the small steps) by a rational division factor and adding to the result of this division a standard frequency P which is in a fixed integral ratio with the large steps so as to give an intermediate frequency Fi, while the second circuit multiplies the said intermediate frequency by the said rational factor, wherein the second circuit divides the intermediate frequency Fi by a fixed integral ratio D and compares the result Fi/D of the division to a beat between the output frequency Fs and a harmonic N. Fi of the intermediate frequency, while the said rational factor is N+1/D.
Claim 2
Dependent Claim
165 words
A frequency synthesizer for generating an output frequency Fs by adding large frequency steps to a frequency itself comprising smaller frequency steps and comprising first and second circuits, each of said circuits including at least one current or voltage controlled oscillator controlled by a phase lock loop, the first circuit dividing, by means of a programmable divider, the input frequency Fo+Δ (Δbeing the sum of the small steps) by a rational division factor and adding to the result of this division a standard frequency P which is in a fixed integral ratio with the large steps so as to give an intermediate frequency Fi, while the second circuit multiplies the said intermediate frequency by the said rational factor, wherein the second circuit divides the intermediate frequency Fi by a fixed integral ratio D and compares the result Fi/D of the division to a beat between the output frequency Fs and a harmonic N. Fi of the intermediate frequency, while the said rational factor is N+1/D.
Claim 3
Dependent Claim
114 words
A frequency synthesizer as claimed in claim 1, wherein the first circuit includes an auxiliary phase lock loop comprising an auxiliary oscillator and a comparator, said comparator receiving firstly the beat between the input frequency Fo+Δ and the frequency of the auxiliary oscillator and secondly the result of the division of the frequency of the auxiliary oscillator by the product ND, and a main phase lock loop comprising a main oscillator and a further comparator, said further comparator receiving firstly a beat between the standard frequency P and the frequency Fi of the main oscillator and secondly the result F A /N of the divisionn by N of the frequency of the auxiliary oscillator.
Claim 4
Dependent Claim
30 words
A frequency synthesizer as claimed in claim 2, wherein the comparator of said auxiliary phase lock loop is a frequency-phase comparator and the second circuit also includes a frequency-phase comparator.
Claim 5
Dependent Claim
44 words
A frequency synthesizer as claimed in claim 3, wherein the fixed division ratio D is equal to 4 and means are provided to effect an inversion of the connections of the frequencies to be compared at the inputs of each of said frequency-phase comparators.
References Cited (Backward Citations)
US4458329A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1990-07-20 | 1991-01-19 | 1991-07-21 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1994-07-20 | 1995-01-19 | 1995-07-21 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1998-07-20 | 1999-01-19 | 1999-07-21 | $7700.00 | Window Closed / Lapsed |