US4680556A
Expired / Lapsed
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Digital modulation apparatus
Assignee: Hitachi Ltd
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Filing: 1986-04-10
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Granted: 1987-07-14
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Expires: 2006-04-10
Abstract
Abstract A quadrature phase modulator constructed by use of a simple digital circuit. Digital signals of sample data obtained by sampling outputs from a roll-off filter with a frequency four times a modulated carrier frequency are stored in an ROM, the outputs corresponding to all combinations of a plurality of successive bits of input data; the plurality of bits are set as an address, and a signal of an in-phase channel and a signal of a quadrature phase channel is alternately read from the ROM with a frequency equal to half the sampling frequency, then the obtained serial signals are subjected to a digital-to-analog conversion to obtain a quadrature phase modulated signal.
Inventors
- 👤 Shigeki Nakamura
- 👤 Makoto Ohnishi
- 👤 Yasufumi Takahashi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 14:10
CPC Classifications
H; H04; H04L; H04L27/00; H04L27/18; H04L27/20; H04L27/2032; H04L27/2092
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
91 words
A digital modulator comprising: first means including memory elements for storing quantized values obtained by combining impulse responses from a roll-off filter which operates at a sampling frequency which is four times the frequency of a modulated carrier signal for a length of successive input data bits; second means for determining an address, for a bit pattern associated with the bit length of the input data, indicating a content stored in said memory elements; and third means for effecting a D/A conversion on the quantized value obtained from said first means.
Claim 2
Dependent Claim
91 words
A digital modulator comprising: first means including memory elements for storing quantized values obtained by combining impulse responses from a roll-off filter which operates at a sampling frequency which is four times the frequency of a modulated carrier signal for a length of successive input data bits; second means for determining an address, for a bit pattern associated with the bit length of the input data, indicating a content stored in said memory elements; and third means for effecting a D/A conversion on the quantized value obtained from said first means.
Claim 3
Dependent Claim
23 words
A digital modulator according to claim 1 wherein said memory elements of said first means are provided in the form of a ROM.
Claim 4
Dependent Claim
99 words
A digital modulator according to claim 1 wherein said second means includes: a first shift register and a second shift register connected to receive and store data from a P (in phase) channel and a Q (quadrature) channel for input data, respectively; multiplexer means for fetching data stored in said first and second shift registers in an alternating fashion in synchronism with a clock signal subjected to said sampling frequency; and counter means for counting said clock signal; the outputs of said counter means and said multiplexer means specifying said address of the memory elements of said first means.
References Cited (Backward Citations)
US4584541A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1990-07-13 | 1991-01-12 | 1991-07-14 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1994-07-13 | 1995-01-12 | 1995-07-14 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1998-07-13 | 1999-01-12 | 1999-07-14 | $7700.00 | Window Closed / Lapsed |