Patent US2268891A successfully refreshed from Google Patents.
US4680489A
Expired / Lapsed
US
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Controllable piecewise linear gain circuit
Assignee: Conexant Systems LLC
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Filing: 1986-09-25
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Granted: 1987-07-14
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Expires: 2006-09-25
Abstract
Abstract A controllable, piecewise linear gain circuit includes a first field effect transistor (FET), the drain of which is connected to a first source of bias voltage and the gate of which is connected to the input to the circuit. A first capacitor is connected between the gate of the FET and a common ground. The drain of a second FET is connected to the gate of the first FET, while the gate of the second FET is connected to a second source of bias voltage. A second capacitor is connected between the source of the second FET and the common ground. With this configuration, the output voltage of the circuit may be measured across an output resistance connected between the common ground and the source of the first FET, such that the second FET will turn on and connect the second capacitor to the output of the circuit when a predetermined amount of charge has accumulated on the first capacitor, thereby reducing the gain of the circuit. The circuit may be adapted to receive the output from a charge coupled device, the gate of the first FET being connected to the output of the charge coupled device to periodically receive packets of electrical charge which are transferred through the charge coupled device. The circuit may also be adapted to provide the input for a multiplexer, the input of the multiplexer being connected between the common ground and the gate of the first FET to control the output voltage of the circuit.
Inventors
- 👤 Scott B. Stetson
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 14:40
CPC Classifications
G; G11; G11C; G11C27/00; G11C27/04; G11C19/00; G11C19/28; G11C19/282; G11C19/285
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
174 words
A controllable, piecewise linear gain circuit, comprising: a first field effect transistor, the drain of which is connected to a first source of bias voltage and the gate of which is connected to the input to the circuit; a first capacitor connected between the gate of the first field effect transistor and a common ground; a second field effect transistor, the drain of which is connected to the gate of the first field effect transistor and the gate of which is connected to a second source of bias voltage; a second capacitor connected between the source of the second field effect transistor and the common ground; whereby the output voltage of the circuit may be measured across an output resistance connected between the common ground and the source of the first field effect transistor, such that the second field effect transistor will turn on and connect the second capacitor to the output of the circuit when a predetermined amount of charge has accumulated on the first capacitor, thereby reducing the gain of the circuit.
Claim 2
Dependent Claim
174 words
A controllable, piecewise linear gain circuit, comprising: a first field effect transistor, the drain of which is connected to a first source of bias voltage and the gate of which is connected to the input to the circuit; a first capacitor connected between the gate of the first field effect transistor and a common ground; a second field effect transistor, the drain of which is connected to the gate of the first field effect transistor and the gate of which is connected to a second source of bias voltage; a second capacitor connected between the source of the second field effect transistor and the common ground; whereby the output voltage of the circuit may be measured across an output resistance connected between the common ground and the source of the first field effect transistor, such that the second field effect transistor will turn on and connect the second capacitor to the output of the circuit when a predetermined amount of charge has accumulated on the first capacitor, thereby reducing the gain of the circuit.
Claim 3
Dependent Claim
52 words
The circuit of claim 1, wherein the circuit is adapted to receive the output from a charge coupled device, the gate of the first field effect transistor being connected to the output of the charge coupled device to periodically receive packets of electrical charge which are transferred through the charge coupled device.
Claim 4
Dependent Claim
45 words
The circuit of claim 1, wherein the circuit is adapted to provide the input for a multiplexer, the input to the multiplexer being connected between the common ground and the gate of the first field effect transistor to control the output voltage of the circuit.
Claim 5
Dependent Claim
197 words
A controllable, piecewise linear gain output circuit for a charge coupled device, comprising: a first field effect transistor, the drain of which is connected to a first source of bias voltage and the gate of which is connected to the output of the charge coupled device to periodically receive packets of electrical charge which are transferred through the charge coupled device; a first capacitor connected between the gate of the first field effect transistor and a common ground; a second field effect transistor, the drain of which is connected to the gate of the first field effect transistor and the gate of which is connected to a second source of bias voltage; a second capacitor connected between the source of the second field effect transistor and the common ground; whereby the output voltage of the circuit may be measured across an output resistance connected between the common ground and the drain of the first field effect transistor, such that the second field effect transistor will turn on and connect the second capacitor to the output of the circuit when a predetermined amount of charge has accumulated on the first capacitor, thereby reducing the gain of the circuit.
Claim 6
Dependent Claim
197 words
A controllable, piecewise linear gain output circuit for a charge coupled device, comprising: a first field effect transistor, the drain of which is connected to a first source of bias voltage and the gate of which is connected to the output of the charge coupled device to periodically receive packets of electrical charge which are transferred through the charge coupled device; a first capacitor connected between the gate of the first field effect transistor and a common ground; a second field effect transistor, the drain of which is connected to the gate of the first field effect transistor and the gate of which is connected to a second source of bias voltage; a second capacitor connected between the source of the second field effect transistor and the common ground; whereby the output voltage of the circuit may be measured across an output resistance connected between the common ground and the drain of the first field effect transistor, such that the second field effect transistor will turn on and connect the second capacitor to the output of the circuit when a predetermined amount of charge has accumulated on the first capacitor, thereby reducing the gain of the circuit.
Claim 7
Dependent Claim
176 words
A controllable, piecewise linear gain input circuit for a multiplexer, comprising: a first field effect transistor, the drain of which is connected to a first source of bias voltage and the gate of which is connected to the input to the circuit; a first capacitor connected between the gate of the first field effect transistor and a common ground; a second field effect transistor, the drain of which is connected to the gate of the first field effect transistor and the gate of which is connected to a second source of bias voltage; a second capacitor connected between the source of the second field effect transistor and the common ground; wherein the input to the multiplexer is connected between the common ground and the gate of the first field effect transistor to control the output voltage of the circuit, such that the second field effect transistor will turn on and connect the second capacitor to the output when a predetermined amount of charge has accumulated on the first capacitor, thereby reducing the gain of the circuit.
Claim 8
Dependent Claim
176 words
A controllable, piecewise linear gain input circuit for a multiplexer, comprising: a first field effect transistor, the drain of which is connected to a first source of bias voltage and the gate of which is connected to the input to the circuit; a first capacitor connected between the gate of the first field effect transistor and a common ground; a second field effect transistor, the drain of which is connected to the gate of the first field effect transistor and the gate of which is connected to a second source of bias voltage; a second capacitor connected between the source of the second field effect transistor and the common ground; wherein the input to the multiplexer is connected between the common ground and the gate of the first field effect transistor to control the output voltage of the circuit, such that the second field effect transistor will turn on and connect the second capacitor to the output when a predetermined amount of charge has accumulated on the first capacitor, thereby reducing the gain of the circuit.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1990-07-13 | 1991-01-12 | 1991-07-14 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1994-07-13 | 1995-01-12 | 1995-07-14 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1998-07-13 | 1999-01-12 | 1999-07-14 | $7700.00 | Window Closed / Lapsed |