US4679309A
Expired / Lapsed
US
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Process for manufacturing isolated semi conductor components in a semi conductor wafer
Assignee: POUR L'ETUDE ET LA FABRICATION DE CIRCUITS INTEGRES SPECIAUX EFCIS 17 AVE DES MARTYRS 38100 GRENOBLE Ste
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Filing: 1984-06-18
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Granted: 1987-07-14
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Expires: 2004-06-18
Abstract
Abstract A process for manufacturing isolated semi conductor components in a semi conductor wafer of the type used in bipolar technology. In this process, polycrystalline silicon is deposited in a recess in a silicon substrate whose walls are insulated by a silicon nitride layer except for an opening formed in this nitride layer at the bottom of said recess. Then, the polycrystalline silicon is re-epitaxied so as to become monocrystalline silicon by thermal heating from the "nucleus" formed by the underlying silicon in said opening.
Inventors
- 👤 Joseph Borel
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 08:00
CPC Classifications
H; H10; H10P; H10P90/00; H10P90/19; H10P90/1904; H10P90/1906; H10W; H10W10/00; H10W10/01; H10W10/061; H10W10/10; H10W10/181; H10P14/00; H10P14/20; H10P14/29; H10P14/2901; H10P14/2902; H10P14/2905; H10P14/32; H10P14/3202; H10P14/3238; H10P14/3242; H10P14/3244; H10P14/3251; H10P14/34; H10P14/3402; H10P14/3404; H10P14/3411; H10P14/3451; H10P14/3452; H10P14/3458; H10P14/38; H10P14/3802; H10P14/3808; H10P90/1912; H10W10/011; H10W10/012; H10W10/13; Y; Y10; Y10S; Y10S148/00; Y10S148/011
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
143 words
A process for manufacturing isolated semiconductor components on a semiconductor wafer of the type used in bipolar technology comprising a substrate of a first type of conductivity on which is formed an epitaxied layer of a second type of conductivity, this process comprising the following steps: partially hollowing out or recessing the epitaxied layer in zones of chosen perimeter defined by means of a first insulating masking layer; depositing a second insulating layer on the epitaxied layer; opening locally a window in said second insulating layer at the bottom of said recess zone; depositing polycrystalline silicon in said recessed zone; epitaxying said polycrystalline silicon from its contact zone with the underlying silicon at the position of said window; locally oxidizing said epitaxied polycrystalline silicon layer over the whole of its thickness opposite said window; and forming the desired components in said epitaxied zones.
Claim 2
Dependent Claim
143 words
A process for manufacturing isolated semiconductor components on a semiconductor wafer of the type used in bipolar technology comprising a substrate of a first type of conductivity on which is formed an epitaxied layer of a second type of conductivity, this process comprising the following steps: partially hollowing out or recessing the epitaxied layer in zones of chosen perimeter defined by means of a first insulating masking layer; depositing a second insulating layer on the epitaxied layer; opening locally a window in said second insulating layer at the bottom of said recess zone; depositing polycrystalline silicon in said recessed zone; epitaxying said polycrystalline silicon from its contact zone with the underlying silicon at the position of said window; locally oxidizing said epitaxied polycrystalline silicon layer over the whole of its thickness opposite said window; and forming the desired components in said epitaxied zones.
Claim 3
Dependent Claim
293 words
The process for manufacturing isolated semi conductor components on a semiconductor wafer of the type used in bipolar technology comprising a substrate of a first type of conductivity on which is formed an epitaxied layer of the second type of conductivity, buried layers of the second type of conductivity being possibly provided in chosen positions at the interface between the substrate and the epitaxied layer, this process comprising the following steps: partially hollowing out or recessing said epitaxied layer in zones defined by means of appropriate masks. depositing a silicon nitride layer on the epitaxied layer, masking the bottom of the recessed zones except for the periphery of these zone with resin mask, irradiating with ions conferring distinct etching speeds on the irradiated and non irradiated nitride layer portions, said irradiation acting over a depth at most equal to that of the nitride layer, proceeding with chemical etching of the silicon nitride layer so as to remove a thickness corresponding to that of the nitride layer so that, at the bottom of the recessed zones, the masked part of the second nitride layer is not affected, whereas at the periphery the underlying semi-conductor is bared and so that, on the sides of the recessed zones, a thinned portion of said nitride layer remains, oxidizing the visible silicon at least until the boundary between the substrate and the epitaxied layer is reached, locally opening the nitride layer in the form of a window at the bottom of said recessed zones, depositing polycrystalline silicon from its contact zone with the underlying silicon at the position of said windows, epitaxying said polycrystalline silicon from its contact zone with the underlying silicon at the position of said windows, and forming the desired components in said epitaxied zones.
Claim 4
Dependent Claim
293 words
The process for manufacturing isolated semi conductor components on a semiconductor wafer of the type used in bipolar technology comprising a substrate of a first type of conductivity on which is formed an epitaxied layer of the second type of conductivity, buried layers of the second type of conductivity being possibly provided in chosen positions at the interface between the substrate and the epitaxied layer, this process comprising the following steps: partially hollowing out or recessing said epitaxied layer in zones defined by means of appropriate masks. depositing a silicon nitride layer on the epitaxied layer, masking the bottom of the recessed zones except for the periphery of these zone with resin mask, irradiating with ions conferring distinct etching speeds on the irradiated and non irradiated nitride layer portions, said irradiation acting over a depth at most equal to that of the nitride layer, proceeding with chemical etching of the silicon nitride layer so as to remove a thickness corresponding to that of the nitride layer so that, at the bottom of the recessed zones, the masked part of the second nitride layer is not affected, whereas at the periphery the underlying semi-conductor is bared and so that, on the sides of the recessed zones, a thinned portion of said nitride layer remains, oxidizing the visible silicon at least until the boundary between the substrate and the epitaxied layer is reached, locally opening the nitride layer in the form of a window at the bottom of said recessed zones, depositing polycrystalline silicon from its contact zone with the underlying silicon at the position of said windows, epitaxying said polycrystalline silicon from its contact zone with the underlying silicon at the position of said windows, and forming the desired components in said epitaxied zones.
Claim 5
Dependent Claim
32 words
The process as claimed in claim 2, further comprising, after the epitaxying step, the following step; locally oxidizing said epitaxied polycrystalline silicon layer over the whole of its thickness opposite said windows.
References Cited (Backward Citations)
GB2065370A
Cited
EP0032211A2
Cited
EP0045848A1
Cited
JPS57112044A
Cited
JPS583243A
Cited
JPS58192346A
Cited
US4494303A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1990-07-13 | 1991-01-12 | 1991-07-14 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1994-07-13 | 1995-01-12 | 1995-07-14 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1998-07-13 | 1999-01-12 | 1999-07-14 | $7700.00 | Window Closed / Lapsed |