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US4679062A Expired / Lapsed US ⏱️ 0.0 years remaining

Thin film transistor

Assignee: Philips Components Kobe KK
•
Filing: 1985-12-16
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Granted: 1987-07-07
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Expires: 2005-12-16
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Abstract

Abstract An impurity-doped amorphous silicon semiconductor layer is deposited on a substrate, source and drain electrodes are deposited apart from each other on the amorphous silicon semiconductor layer in ohmic contact therewith and a gate electrode is deposited on the amorphous silicon semiconductor layer in Schottky contact therewith between the source and drain electrodes, thereby forming a thin film transistor.

Inventors

  • 👤 Kotaro Okamoto

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-31 04:12
CPC Classifications
H; H10; H10D; H10D86/00; H10D86/40; H10D30/00; H10D30/80; H10D30/87; H10D30/875; H10D86/60

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 94 words
A thin film transistor comprising: a substrate; an impurity-doped hydrogenated amorphous silicon semiconductor layer formed on the substrate; a source and drain electrode formed apart from one another on the amorphous silicon semiconductor layer in ohmic contact therewith; a gate electrode formed on the amorphous silicon semiconductor layer in Schottky contact therewith between the source and drain electrodes, the portion of said amorphous silicon semiconductor layer underlying the gate electrode being 0.1 to 1.0 μm thick; and an impurity-undoped amorphous silicon semiconductor layer interposed between the impurity-doped amorphous silicon semiconductor layer and the substrate.
Claim 2
Dependent Claim 94 words
A thin film transistor comprising: a substrate; an impurity-doped hydrogenated amorphous silicon semiconductor layer formed on the substrate; a source and drain electrode formed apart from one another on the amorphous silicon semiconductor layer in ohmic contact therewith; a gate electrode formed on the amorphous silicon semiconductor layer in Schottky contact therewith between the source and drain electrodes, the portion of said amorphous silicon semiconductor layer underlying the gate electrode being 0.1 to 1.0 μm thick; and an impurity-undoped amorphous silicon semiconductor layer interposed between the impurity-doped amorphous silicon semiconductor layer and the substrate.
Claim 3
Dependent Claim 60 words
A thin film transistor according to claim 1 wherein a groove is cut in the impurity-doped amorphous silicon semiconductor layer between the source and drain electrodes, the gate electrode is formed on the bottom of the groove, and that portion of the impurity-doped semiconductor layer underlying the gate electrode is thinner than those portions underlying the source and drain electrodes.
Claim 4
Dependent Claim 129 words
A thin film transistor for use as an active element of a drive circuit formed on a transparent substrate for driving switching elements to select picture element electrodes of an active matrix liquid crystal display cell, the thin film transistor comprising: an impurity-doped hydrogenated amorphous silicon semiconductor layer formed on the transparent substrate; a source and a drain electrode formed apart from one another on the amorphous silicon semiconductor layer in ohmic contact therewith; a gate electrode formed on the amorphous silicon semiconductor layer in Schottky contact therewith between the source and drain electrodes, that portion of the amorphous silicon layer underlying the gate electrode being 0.1 to 1.0 μm thick; and an impurity-undoped amorphous silicon semiconductor layer interposed between the impurity-doped amorphous silicon semiconductor layer and the substrate.
Claim 5
Dependent Claim 129 words
A thin film transistor for use as an active element of a drive circuit formed on a transparent substrate for driving switching elements to select picture element electrodes of an active matrix liquid crystal display cell, the thin film transistor comprising: an impurity-doped hydrogenated amorphous silicon semiconductor layer formed on the transparent substrate; a source and a drain electrode formed apart from one another on the amorphous silicon semiconductor layer in ohmic contact therewith; a gate electrode formed on the amorphous silicon semiconductor layer in Schottky contact therewith between the source and drain electrodes, that portion of the amorphous silicon layer underlying the gate electrode being 0.1 to 1.0 μm thick; and an impurity-undoped amorphous silicon semiconductor layer interposed between the impurity-doped amorphous silicon semiconductor layer and the substrate.
Claim 6
Dependent Claim 32 words
A thin film transistor according to claim 1 or claim 3 wherein the impurity concentration of the hydrogenated amorphous silicon layer is in the range of 0.75×10 -3 to 1.5×10 -3 .
Claim 7
Dependent Claim 20 words
A thin film transistor according to claim 4 wherein the impurity doped in the hydrogenated amorphous silicon layer is phosphorus.
Claim 8
Dependent Claim 30 words
A thin film transistor according to claim 1 or claim 3 wherein that portion of the amorphous silicon semiconductor layer underlying the gate electrode is 0.3 to 0.5 μm thick.
Claim 9
Dependent Claim 19 words
A thin film transistor according to claim 1 or claim 3 wherein the gate electrode is formed of gold.

References Cited (Backward Citations)

US4489149A Cited
US4532536A Cited
US4558340A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1990-07-06 1991-01-05 1991-07-07 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1994-07-06 1995-01-05 1995-07-07 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1998-07-06 1999-01-05 1999-07-07 $7700.00 Window Closed / Lapsed

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