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US4678980A Expired / Lapsed US ⏱️ 0.0 years remaining

Power failure stop circuit for a converter

Assignee: Mitsubishi Electric Corp
•
Filing: 1986-10-27
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Granted: 1987-07-07
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Expires: 2006-10-27
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Abstract

Abstract The voltage in a converter 20 is compared with a reference voltage to detect an input power failure, in response to which a motor driven by the converter is automatically decelerated in accordance with a stored signal pattern/speed reduction curve such that the energy regenerated by the motor is equal to its power consumption. The DC bus voltage of the converter is thus maintained substantially constant during the regenerative braking of the motor, and it is promptly halted without resort to any mechanical braking unit.

Inventors

  • 👤 Shigeyuki Sugimoto
  • 👤 Masayuki Kato
  • 👤 Katsuhiko Chonan

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 21:21
CPC Classifications
H; H02; H02P; H02P3/00; H02P3/06; H02P3/08; H02P3/14; H02H; H02H7/00; H02H7/10; H02H7/12; H02H7/1216

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 321 words
A power failure stop circuit for a converter (20) including a power rectifier unit (1) and a power inverter unit (3), comprising: (a) a voltage detection circuit (5) for detecting an operating voltage in said converter; (b) a voltage level setter (6) for establishing a reference voltage signal; (c) a comparator (7) for comparing the reference voltage signal with the converter operating voltage, and for outputting a power failure signal when said operating voltage becomes lower than said reference voltage; (d) an operation mode decision circuit (15) for comparing a target speed command (f i ) with an output frequency command (f o ) to determine a normal operating mode for said converter and for outputting an overriding deceleration mode signal irrespective of the normal operating mode at the time of a power failure; (e) an output frequency command decision circuit (10) for generating a first frequency command in accordance with said normal operating mode determination; (f) a power failure output frequency command decision circuit (16) for generating a second frequency command in accordance with an internally stored deceleration pattern established exclusively for power failures in response to an overriding deceleration mode signal from the operation mode decision circuit; (g) an acceleration/deceleration pattern selection circuit (17) for selecting the first frequency command from the output frequency command decision circuit when no power failure signal is present, and the second frequency command from the power failure output frequency command decision circuit when a power failure signal is present; (h) a PWM signal generation circuit (11) responsive to a frequency command selected by the acceleration/deceleration pattern selection circuit for generating a converter control signal; and (i) a driving circuit (13) for switching power inverter unit elements to control a motor speed in accordance with the control signal from the PWM signal generation circuit such that a deceleration mode is automatically implemented in the event of a power failure to regeneratively brake the motor.
Claim 2
Dependent Claim 321 words
A power failure stop circuit for a converter (20) including a power rectifier unit (1) and a power inverter unit (3), comprising: (a) a voltage detection circuit (5) for detecting an operating voltage in said converter; (b) a voltage level setter (6) for establishing a reference voltage signal; (c) a comparator (7) for comparing the reference voltage signal with the converter operating voltage, and for outputting a power failure signal when said operating voltage becomes lower than said reference voltage; (d) an operation mode decision circuit (15) for comparing a target speed command (f i ) with an output frequency command (f o ) to determine a normal operating mode for said converter and for outputting an overriding deceleration mode signal irrespective of the normal operating mode at the time of a power failure; (e) an output frequency command decision circuit (10) for generating a first frequency command in accordance with said normal operating mode determination; (f) a power failure output frequency command decision circuit (16) for generating a second frequency command in accordance with an internally stored deceleration pattern established exclusively for power failures in response to an overriding deceleration mode signal from the operation mode decision circuit; (g) an acceleration/deceleration pattern selection circuit (17) for selecting the first frequency command from the output frequency command decision circuit when no power failure signal is present, and the second frequency command from the power failure output frequency command decision circuit when a power failure signal is present; (h) a PWM signal generation circuit (11) responsive to a frequency command selected by the acceleration/deceleration pattern selection circuit for generating a converter control signal; and (i) a driving circuit (13) for switching power inverter unit elements to control a motor speed in accordance with the control signal from the PWM signal generation circuit such that a deceleration mode is automatically implemented in the event of a power failure to regeneratively brake the motor.
Claim 3
Dependent Claim 67 words
The circuit of claim 1, wherein said power failure signal is inputted to the operation mode decision circuit (15) and to the acceleration/deceleration pattern selection circuit (17) via a holding circuit (8), whereby an overriding deceleration mode signal is outputted from the operation mode decision circuit, and the acceleration/deceleration pattern selection circuit selects the second frequency command and outputs it to the PWM signal generation circuit (11).
Claim 4
Dependent Claim 38 words
The circuit of claim 1, wherein the regenerative braking power from the motor is adjusted by the stored deceleration pattern such that the regenerative power and the motor power consumption become equal when a power failure is detected.
Claim 5
Dependent Claim 24 words
The circuit of claim 1, wherein said voltage detection circuit (5) detects an input voltage to the power rectifier unit (1) of the converter.
Claim 6
Dependent Claim 24 words
The circuit of claim 1, wherein said voltage detection circuit (5) detects an output voltage from said power inverter unit (3) of the converter.

References Cited (Backward Citations)

JPS5234311A Cited
JPS5234312A Cited
US4445167A Cited
US4506766A Cited
US4620296A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1990-07-06 1991-01-05 1991-07-07 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1994-07-06 1995-01-05 1995-07-07 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1998-07-06 1999-01-05 1999-07-07 $7700.00 Window Closed / Lapsed

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