Simulated transistor/diode

Claim 2

A circuit in which current flow between first and second flow terminals thereof is controlled in response to an input voltage between a control terminal thereof and the second terminal, the circuit comprising: a main transistor having a first flow electrode coupled to the first terminal, a second flow electrode coupled to the second terminal, and a control electrode for regulating currect transmission between the flow electrodes; a first resistor coupled between a control point and a first node which is coupled to the control electrode; a second resistor coupled between the control point and a second node; and control means for regulating the voltage at the control point in response to the input voltage and for supplying current to/from the nodes without substantially affecting the currents at the flow terminals, the control means coupled to the nodes, the control point, and the control terminal which are all separate from one another, V CS being approximately V C /B where V CS is the input voltage, V C is the voltage between the control and second electrodes and B equals one plus the ratio of the value of the first resistor to the value of the second resistor.

Claim 3

A circuit in which current flow between first and second flow terminals thereof is controlled in response to an input voltage between a control terminal thereof and the second terminal, the circuit comprising: a main transistor having a first flow electrode coupled to the first terminal, a second flow electrode coupled to the second terminal, and a control electrode for regulating current transmission between the flow electrodes; a first resistor coupled between a control point and a first node which is coupled to the control electrode; a second resistor coupled between the control point and a second node; control means for regulating the voltage at the control point in response to the input voltage and for supplying current to/from the nodes without substantially affecting the currents at the flow terminals, the control means coupled to the nodes, the control point, and the control terminal which are all separate from one another; and means for causing the voltage between the control electrode and the control point to differ by at least a selected voltage from that otherwise due to regulation of the voltage at the control point in response to the input voltage, V CS being approximately (V C -V A )/B where V CS is the input voltage, V C is the voltage between the control and second electrodes, V A is the selected voltage, and B equals one plus the ratio of the value of the first resistor to the value of the second resistor.

Claim 4

A circuit in which current flow between first and second flow terminals thereof is controlled in response to an input voltage between a control terminal thereof and the second terminal, the circuit comprising: a main transistor having a first flow electrode coupled to the first terminal, a second flow electrode coupled to the second terminal, and a control electrode for regulating current transmission between the flow electrodes; a first resistor coupled between a control point and a first node which is coupled to the control electrode; a second resistor coupled between the control point and a second node; control means for regulating the voltage at the control point in response to the input voltage and for supplying current to/from the nodes without substantially affecting the currents at the flow terminals, the control means coupled to the nodes, the control point, and the control terminal which are all separate from one another; and means for causing the voltage between the control electrode and the control point to differ by at least a selected voltage from that otherwise due to regulation of the voltage at the control point in response to the input voltage, V CS being approximately (V C -V A )/B where V CS is the input voltage, V C is the voltage between the control and second electrodes, V A is the selected voltage, and B equals one plus the ratio of the value of the first resistor to the value of the second resistor.

Claim 5

A circuit as in claim 2 wherein V CS , V C , and V A are either all positive or all negative.

Claim 6

A circuit as in claim 1, 2, or 3 wherein the voltage at the control point largely follows the input voltage.

Claim 7

A circuit as in claim 1 or 2 wherein the control terminal is coupled to the first terminal.

Claim 8

A circuit as in claim 1 or 2 wherein the control means forces the voltage between the control point and the control terminal to be near a specified value and forces the voltage between the second node and the second terminal to be near a specified value.

Claim 9

A circuit as in claim 6 wherein the control means comprises: first amplifying means having an inverting input terminal coupled to the control point, a non-inverting input terminal coupled to the control terminal, and a output terminal coupled to the first node; and second amplifying means having an inverting input terminal coupled to the second node, a non-inverting input terminal coupled to the second terminal, and an output terminal coupled to the second node.

Claim 10

A circuit as in claim 7 wherein the transistor is a bipolar transistor having a base, a collector, and an emitter which respectively are the control, first, and second electrodes.

Claim 11

A circuit as in claim 6 including means for imposing a corrective voltage between the control electrode and the control point to account for the voltage between the control point and the control terminal and for the voltage between the second node and the second terminal.

Claim 12

A circuit as in claim 1 or 2 wherein the control means comprises operational floating amplifying means having non-inverting and inverting input terminals respectively coupled to the control terminal and the control point and having non-inverting and inverting output terminals respectively coupled to the first and second nodes.

Claim 13

A circuit as in claim 1 or 2 wherein the first node is directly connected to the control electrode.

Claim 14

An envelope detector having first means coupled between an input terminal and an intermediate node for providing it with current moving in only single flow direction, second means coupled between the node and an output terminal for providng it with current moving in only a single flow direction, an impedance between the first means and the node, an impedance between the node and a voltage supply, an impedance between the node and the output terminal, a capacitor between the node and the voltage supply, and a capacitor between the output terminal and the voltage supply, characterized in that each of the means is a circuit in which current flow between first and second flow terminals thereof is controlled in response to an input voltage between a control terminal thereof and the second terminal, the circuit comprising: a main transistor having a first flow electrode coupled to the first terminal, a second flow electrode coupled to the second terminal, and a control electrode for regulating current transmission between the flow electrodes; a first resistor coupled between a control point and a first node which is coupled to the control eectrode; a second resistor coupled between the control point and a second node; and a control system for regulating the voltage at the control point in response to the input voltage and for supplying current to/from the nodes without substantially affecting the currents at the flow terminals, the control system coupled to the nodes, the control point, and the control terminal which are all separate from one another.

Claim 15

An envelope detector having first means coupled between an input terminal and an intermediate node for providing it with current moving in only single flow direction, second means coupled between the node and an output terminal for providng it with current moving in only a single flow direction, an impedance between the first means and the node, an impedance between the node and a voltage supply, an impedance between the node and the output terminal, a capacitor between the node and the voltage supply, and a capacitor between the output terminal and the voltage supply, characterized in that each of the means is a circuit in which current flow between first and second flow terminals thereof is controlled in response to an input voltage between a control terminal thereof and the second terminal, the circuit comprising: a main transistor having a first flow electrode coupled to the first terminal, a second flow electrode coupled to the second terminal, and a control electrode for regulating current transmission between the flow electrodes; a first resistor coupled between a control point and a first node which is coupled to the control eectrode; a second resistor coupled between the control point and a second node; and a control system for regulating the voltage at the control point in response to the input voltage and for supplying current to/from the nodes without substantially affecting the currents at the flow terminals, the control system coupled to the nodes, the control point, and the control terminal which are all separate from one another.

Claim 16

A circuit as in claim 12 characterized in that at least one of the means includes a circuit portion for causing the voltage between the control electrode of that means and its control point to differ by at least a selected voltage from that otherwise due to regulation of the voltage at its control point in response to its input voltage.

Claim 17

A circuit as in claim 12 or 13 characterized in that: the first means has its control and second terminals respectively coupled to the input terminal and the node; and the second means has its control and second terminals respectively coupled to the node and the output terminal.

Claim 18

A detector as in claim 14 characterized in that the first means has its first terminal coupled to a voltage supply.

Claim 19

A detector as in claim 14 chracterized in that the second means has its first terminal coupled to its control terminal.

Claim 20

A detector as in claim 12 or 13 wherein each impedance comprises a resistor.