Low-power feedforward amplifier

Claim 2

A low-power feedforward amplifier, comprising: (a) a main amplifier (b) means for comparing a sample of an input signal supplied to said main amplifier with a sample of an output signal from said main amplifier, said comparing means producing an error signal proportional to the difference between said signal samples; and (c) means for amplifying said error signal and combining the amplified error signal with the main amplifier output signal in opposite phase, whereby distortion and noise products generated by said main amplifier are substantially cancelled, said amplifying and combining means including an error amplifier having a plurality of gain stages which share the same bias current.

Claim 3

The low-power feedforward amplifier of claim 1 wherein said plurality of gain stages of said error amplifier includes a pair of common-emitter transistors amplifiers one of which has an emitter connected through a resistor to a collector of the other.

Claim 4

The low-power feedforward amplifier of claim 2 wherein said main amplifier is a medium-gain amplifier and said error amplifier is a high-gain amplifier.

Claim 5

The low-power feedforward amplifier of claim 3 wherein said main amplifier is a hybrid amplifier and said error amplifier is a discrete amplifier.

Claim 6

The low-power feedforward amplifier of claim 4 further comprising: (d) an amplifier housing having a cover, wherein said comparing means and said amplifying and combining means each include a delay line constructed of stripline and mounted on said cover.

Claim 7

The low-power feedforward amplifier of claim 5 further comprising: (e) means for energizing said main amplifier and said error amplifier from a negative-voltage power supply.

Claim 8

The low-power feedforward amplifier of claim 4 further comprising: (d) an amplifier housing having a cover, wherein said comparing means and said amplifying and combining means each include a delay line constructed of miniature coaxial cable and mounted on said cover.

Claim 9

The low-power feedforward amplifier of claim 7 further comprising: (e) means for energizing said main amplifier and said error amplifier from a negative-voltage power supply.

Claim 10

The low-power feedforward amplifier of claim 1 wherein said plurality of gain stages of said error amplifier includes a pair of cascaded common-emitter transistor amplifiers one of which has an emitter connected through a resistor to a collector of the other to achieve a common bias current.

Claim 11

The low-power feedforward amplifier of claim 1 wherein said main amplifier is a medium-gain amplifier and said error amplifier is a high-gain amplifier.

Claim 12

The low-power feedforward amplifier of claim 10 wherein said main amplifier is a hybrid amplifier and said error amplifier is a discrete amplifier.

Claim 13

The low-power feedforward amplifier of claim 10 further comprising: (e) means for energizing said main amplifier and said error amplifier from a negative-voltage power supply.

Claim 14

A low-power feedforward amplifier, comprising: (a) a main path and a feedforward path, said main path including (1) a main amplifier; (2) a first delay line; and (3) a first directional coupler directly interconnecting said main amplifier and said first delay line; said feedforward path including (1) a second delay line; (2) an error amplifier having two gain stages which share the same bias current; and (3) a second directional coupler directly interconnecting said second delay line and said error amplifier; (b) an input directional coupler directly interconnecting a signal input of said feedforward amplifier, said main amplifier and said second delay line; (c) an output directional coupler directly interconnecting said first delay line, said error amplifier, and a signal output of said feedforward amplifier; and (d) an attenuation network directly interconnecting said first and second directional couplers.

Claim 15

A low-power feedforward amplifier, comprising: (a) a main path and a feedforward path, said main path including (1) a main amplifier; (2) a first delay line; and (3) a first directional coupler directly interconnecting said main amplifier and said first delay line; said feedforward path including (1) a second delay line; (2) an error amplifier having two gain stages which share the same bias current; and (3) a second directional coupler directly interconnecting said second delay line and said error amplifier; (b) an input directional coupler directly interconnecting a signal input of said feedforward amplifier, said main amplifier and said second delay line; (c) an output directional coupler directly interconnecting said first delay line, said error amplifier, and a signal output of said feedforward amplifier; and (d) an attenuation network directly interconnecting said first and second directional couplers.

Claim 16

The low-power feedforward amplifier of claim 13 wherein said two gain stages of said error amplifier are common-emitter transistor amplifiers one of which has an emitter connected through a resistor to a collector of the other.

Claim 17

The low-power feedforward amplifier of claim 14 further comprising: (e) an amplifier housing having a cover, wherein said first and second delay lines are constructed of stripline and mounted on said cover.

Claim 18

The low-power feedforward amplifier of claim 14 further comprising: (e) an amplifier housing having a cover, wherein said comparing means and said amplifying and combining means each include a delay line constructed of miniature coaxial cable and mounted on said cover.

Claim 19

The low-power feedforward amplifier of claim 13 wherein said two gain stages of said error amplifier are cascaded common-emitter transistor amplifiers one of which has an emitter connected through a resistor to a collector of the other to achieve a common bias current.

Claim 20

A low-power feedforward amplifier, comprising: (a) an active gain and slope control network; and (b) a feedforward stage, said feedforward stage including (1) a main amplifier; (2) means for comparing a sample of an input signal supplied to said main amplifier with a sample of an output signal from said main amplifier, said comparing means producing an error signal proportional to the difference between said signal samples; and (3) means for amplifying said error signal and combining the amplified error signal with the main amplifier output signal in opposite phase, whereby distortion and noise products generated by said main amplifier are substantially cancelled.

Claim 21

A low-power feedforward amplifier, comprising: (a) an active gain and slope control network; and (b) a feedforward stage, said feedforward stage including (1) a main amplifier; (2) means for comparing a sample of an input signal supplied to said main amplifier with a sample of an output signal from said main amplifier, said comparing means producing an error signal proportional to the difference between said signal samples; and (3) means for amplifying said error signal and combining the amplified error signal with the main amplifier output signal in opposite phase, whereby distortion and noise products generated by said main amplifier are substantially cancelled.

Claim 22

The low-power feedforward amplifier of claim 18 wherein said main amplifier is a medium-gain, hybrid amplifier and wherein said amplifying and combining means includes a high-gain, discrete error amplifier.

Claim 23

The low-power feedforward amplifier of claim 19 wherein said error amplifier has a plurality of gain stages which share the same bias current.

Claim 24

The low-power feedforward amplifier of claim 20 further comprising: (c) an amplifier housing having a cover, wherein said comparing means and said amplifying and combining means each include a delay line constructed of stripline and mounted on said cover.

Claim 25

The low-power feedforward amplifier of claim 21 wherein said active gain and slope control network is a discrete amplifier.

Claim 26

The low-power feedforward amplifier of claim 22 wherein said active gain and slope control network includes a common-emitter transistor amplifier having (1) a variable emitter resistor; and (2) a variable cable-equivalent network connected in a feedback path between a transistor collector and base.

Claim 27

The low-power feedforward amplifier of claim 20 further comprising: (c) an amplifier housing having a cover, wherein said comparing means and said amplifying and combining means each include a delay line constructed of miniature coaxial cable and mounted on said cover.

Claim 28

The low-power feedforward amplifier of claim 24 wherein said active gain and slope control network is a discrete amplifier.

Claim 29

The low-power feedforward amplifier of claim 25 wherein said active gain and slope control network includes a common-emitter transistor amplifier having (1) a variable emitter resistor; and (2) a variable cable-equivalent network connected in a feedback path between a transistor collector and base.

Claim 30

The low-power feedforward amplifier of claim 18 wherein said amplifying and combining means includes an error amplifier having a plurality of gain stages which share the same bias current.

Claim 31

The low-power feedforward amplifier of claim 18 further comprising: (c) an amplifier housing having a cover, wherein said comparing means and said amplifying and combining means each include a delay line constructed of stripline and mounted on said cover.

Claim 32

The low-power feedforward amplifier of claim 18 further comprising: (c) an amplifier housing having a cover, wherein said comparing means and said amplifying and combining means each include a delay line constructed of miniature coaxial cable and mounted on said cover.

Claim 33

The low-power feedforward amplifier of claim 18 wherein said active gain and slope control network is a discrete common-emitter transistor amplifier having (1) a variable emitter resistor; and (2) a variable cable-equivalent network connected in a feedback path between a transistor collector and base.

Claim 34

A low-power feedforward amplifier, comprising: (a) an amplifier housing having a cover; (b) a discrete preamplifier including an active gain and slope control network; and (c) a low-power feedforward output stage, said output stage including (1) a main path and a feedforward path, said main path including (A) a medium-gain, hybrid main amplifier; (B) a first delay line, said first delay line being constructed of stripline and mounted on said cover; and (C) a first directional coupler directly interconnecting said main amplifier and said first delay line; said feedforward path including (A) a second delay line, said second delay line being constructed of stripline and mounted on said cover; (B) a high-gain, discrete error amplifier having two gain stages which share the same bias current; and (C) a second directional coupler directly interconnecting said second delay line and said error amplifier; (2) an input directional coupler directly interconnecting a signal input of said feedforward stage, and main amplifier and said second delay line; (3) an output directional coupler directly interconnecting said first delay line, said error amplifier, and a signal output of said feedforward stage; and (4) an attenuation network directly interconnecting said first and second directional couplers.

Claim 35

A low-power feedforward amplifier, comprising: (a) an amplifier housing having a cover; (b) a discrete preamplifier including an active gain and slope control network; and (c) a low-power feedforward output stage, said output stage including (1) a main path and a feedforward path, said main path including (A) a medium-gain, hybrid main amplifier; (B) a first delay line, said first delay line being constructed of stripline and mounted on said cover; and (C) a first directional coupler directly interconnecting said main amplifier and said first delay line; said feedforward path including (A) a second delay line, said second delay line being constructed of stripline and mounted on said cover; (B) a high-gain, discrete error amplifier having two gain stages which share the same bias current; and (C) a second directional coupler directly interconnecting said second delay line and said error amplifier; (2) an input directional coupler directly interconnecting a signal input of said feedforward stage, and main amplifier and said second delay line; (3) an output directional coupler directly interconnecting said first delay line, said error amplifier, and a signal output of said feedforward stage; and (4) an attenuation network directly interconnecting said first and second directional couplers.

Claim 36

The low-power feedforward amplifier of claim 31 further comprising: (d) an input pad; (e) an equalizer directly interconnecting said input pad and said preamplifier; and (f) a signature control network interconnecting said preamplifier and said feedforward output stage.

Claim 37

The low-power feedforward amplifier of claim 32 further comprising: (g) a booster amplifier directly interconnecting said signature control network and said feedforward output stage.

Claim 38

The low-power feedforward amplifier of claim 33 wherein said active gain and slope control network includes a common-emitter transistor amplifier having (1) a variable emitter resistor; and (2) a variable cable-equivalent network connected in a feedback path between a transistor collector and base.

Claim 39

A low-power feedforward amplifier, comprising: (a) an amplifier housing having a cover; (b) a discrete preamplifier including an active gain and slope control network; and (c) a low-power feedforward output stage, said output stage including (1) a main path and a feedforward path, said main path including (A) a medium-gain, hybrid main amplifier; (B) a first delay line, said first delay line being constructed of miniature coaxial cable and mounted on said cover; and (C) a first directional coupler directly interconnecting said main amplifier and said first delay line; said feedforward path including (A) a second delay line, said second delay line being constructed of miniature coaxial cable and mounted on said cover; (B) a high-gain, discrete error amplifier having two gain stages which share the same bias current; and (C) a second directional coupler directly interconnecting said second delay line and said error amplifier; (2) an input directional coupler directly interconnecting a signal input of said feedforward stage, said main amplifier and said second delay line; (3) an output directional coupler directly interconnecting said first delay line, said error amplifier, and a signal output of said feedforward stage; and (4) an attenuation network directly interconnecting said first and second directional couplers.

Claim 40

A low-power feedforward amplifier, comprising: (a) an amplifier housing having a cover; (b) a discrete preamplifier including an active gain and slope control network; and (c) a low-power feedforward output stage, said output stage including (1) a main path and a feedforward path, said main path including (A) a medium-gain, hybrid main amplifier; (B) a first delay line, said first delay line being constructed of miniature coaxial cable and mounted on said cover; and (C) a first directional coupler directly interconnecting said main amplifier and said first delay line; said feedforward path including (A) a second delay line, said second delay line being constructed of miniature coaxial cable and mounted on said cover; (B) a high-gain, discrete error amplifier having two gain stages which share the same bias current; and (C) a second directional coupler directly interconnecting said second delay line and said error amplifier; (2) an input directional coupler directly interconnecting a signal input of said feedforward stage, said main amplifier and said second delay line; (3) an output directional coupler directly interconnecting said first delay line, said error amplifier, and a signal output of said feedforward stage; and (4) an attenuation network directly interconnecting said first and second directional couplers.

Claim 41

The low-power feedforward amplifier of claim 35 further comprising: (d) an input pad; (e) an equalizer directly interconnecting said input pad and said preamplifier; and (f) a signature control network directly interconnecting said preamplifier and said feedforward output stage.

Claim 42

The low-power feedforward amplifier of claim 36 further comprising: (g) a booster amplifier directly interconnecting said signature control network and said feedforward output stage.

Claim 43

The low-power feedforward amplifier of claim 37 wherein said active gain and slope control network includes a common-emitter transistor amplifier having (1) a variable emitter resistor; and (2) a variable cable-equivalent network connected in a feedback path between a transistor collector and base.