US4673871A
Expired / Lapsed
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Digital noise generator
Assignee: Rolls Royce PLC
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Filing: 1985-12-23
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Granted: 1987-06-16
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Expires: 2005-12-23
Abstract
Abstract A digital noise generator for use in aeroengine noise testing can accurately and repeatably reproduce a standard noise spectrum so that differing noise analysis systems can be calibrated to a common standard. The noise generator comprises a pseudo-random binary sequence generator which is fed with a low clock frequency derived from a high frequency crystal oscillator. The generator produces a pseudo-random noise single bit signal which is fed to the most significant bit input of a digital to analogue converter, whose other inputs are fed with simulated tone data residing within an EPROM, the pseudo-random and tone noise thereby being digitally summed before conversion to an output analogue signal of desired spectral characteristics.
Inventors
- 👤 John D. Brown
- 👤 Peter Gladdish
- 👤 Michael A. McCormick
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 09:31
CPC Classifications
H; H03; H03B; H03B29/00; H03K; H03K3/00; H03K3/84
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
146 words
A digital noise generator for synthesising a noise spectrum representative of the noise spectrum of a gas turbine aeroengine, the digital noise generator including: an oscillator having a high pulse frequency output; a pseudo-random binary sequence generator driven by a low frequency clock signal derived from the output of the oscillator thereby to produce a pseudo-random digital noise signal with a spectrum having a broadband pink noise component in the audio range; a read-only memory having at least one memory block therein containing simulated tone data in memory address sequence order; means for addressing the at least one memory block whereby the simulated tone data is outputted from the read-only memory in memory address sequence order thereby to produce a tone signal in digital form; and means for selectively summing the pseudo-random digital noise signal and the tone signal thereby to produce the noise spectrum signal.
Claim 2
Dependent Claim
146 words
A digital noise generator for synthesising a noise spectrum representative of the noise spectrum of a gas turbine aeroengine, the digital noise generator including: an oscillator having a high pulse frequency output; a pseudo-random binary sequence generator driven by a low frequency clock signal derived from the output of the oscillator thereby to produce a pseudo-random digital noise signal with a spectrum having a broadband pink noise component in the audio range; a read-only memory having at least one memory block therein containing simulated tone data in memory address sequence order; means for addressing the at least one memory block whereby the simulated tone data is outputted from the read-only memory in memory address sequence order thereby to produce a tone signal in digital form; and means for selectively summing the pseudo-random digital noise signal and the tone signal thereby to produce the noise spectrum signal.
Claim 3
Dependent Claim
64 words
A digital noise generator according to claim 1 in which the means for summing the pseudo-random noise signal and the tone signal comprises a digital-to-analogue converter, the pseudo-random noise signal being fed to the most significant bit input of the digital-to-analogue converter, and the tone signal being fed to the lower bit inputs thereof thereby to produce the noise spectrum signal in analogue form.
Claim 4
Dependent Claim
69 words
A digital noise generator according to claim 1 in which the read-only memory comprises a plurality of memory blocks each containing simulated tone data in memory address sequence order, the digital noise generator further comprising means for selectively addressing the memory blocks whereby the simulated tone data is outputted from the selected memory block in memory address sequence order thereby to produce a selected tone signal in digital form.
Claim 5
Dependent Claim
66 words
A digital noise generator according to claim 1 in which the read-only memory is addressed by an address counter provided with a clock frequency input switchable between a plurality of clock frequencies, whereby a block of memory being addressed can be addressed at a plurality of rates in order to produce a corresponding plurality of tones from the simulated tone data held in the memory block.
Claim 6
Dependent Claim
115 words
A digital noise generator comprising a clock signal generator, a pseudo-random binary sequence generator, a read-only memory linked to an address counter, and means connected to the pseudo-random binary sequence generator and the read-only memory for summing their outputs to produce a digital signal for conversion to analogue form, wherein the pseudo-random binary sequence generator and the address counter are driven by clock signals from the clock signal generator means, the pseudo-random binary sequence generator thereby outputting a pseudo-random noise signal, the read only memory containing simulated tone data addressable by the address counter at a rate determined by the relevant clock signal to output the tone data for summing with the random noise signal.
Claim 7
Dependent Claim
115 words
A digital noise generator comprising a clock signal generator, a pseudo-random binary sequence generator, a read-only memory linked to an address counter, and means connected to the pseudo-random binary sequence generator and the read-only memory for summing their outputs to produce a digital signal for conversion to analogue form, wherein the pseudo-random binary sequence generator and the address counter are driven by clock signals from the clock signal generator means, the pseudo-random binary sequence generator thereby outputting a pseudo-random noise signal, the read only memory containing simulated tone data addressable by the address counter at a rate determined by the relevant clock signal to output the tone data for summing with the random noise signal.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1990-06-15 | 1990-12-15 | 1991-06-16 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1994-06-15 | 1994-12-15 | 1995-06-16 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1998-06-15 | 1998-12-15 | 1999-06-16 | $7700.00 | Window Closed / Lapsed |