US4672407A
Expired / Lapsed
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Conductivity modulated MOSFET
Assignee: Toshiba Corp
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Filing: 1985-05-28
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Granted: 1987-06-09
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Expires: 2005-05-28
Abstract
Abstract A conductivity modulated MOSFET, having a semiconductor substrate of a first conductivity type, a semiconductor layer of a second conductivity type formed on the semiconductor substrate and having a high resistance, a base layer of the first conductivity type formed in the semiconductor layer, a source layer of the second conductivity type formed in the base layer, a gate electrode formed on a gate insulating film which is formed on a channel region, the channel region being formed in a surface of the base layer between the semiconductor layer and the source layer, a source electrode ohmic-contacting the source layer and the base layer, and a drain electrode formed on the surface of the semiconductor substrate opposite to the semiconductor layer, characterized in that the conductivity modulated MOSFET has a saturation current smaller than a latch-up current when a predetermined gate voltage is applied to the gate electrode.
Inventors
- 👤 Akio Nakagawa
- 👤 Hiromichi Ohashi
- 👤 Yoshihiro Yamaguchi
- 👤 Kiminori Watanabe
- 👤 Thuneo Thukakoshi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 00:31
CPC Classifications
H; H10; H10D; H10D62/00; H10D62/10; H10D62/17; H10D62/393; H10D12/00; H10D12/411; H10D12/415; H10D12/441; H10D62/102; H10D62/103; H10D62/105; H10D62/106; H10D62/124; H10D62/126; H10D62/127
Claims Analysis
Total Claims: 19
Claim 1
Independent Claim
222 words
A conductivity modulated metal oxide semiconductor field effective transistor, comprising: a semiconductor substrate of a first conductivity type which has first and second surfaces; a high resistance semiconductor layer of a second conductivity type which is formed on said first surface of said semiconductor substrate and has a high resistance; a base layer of the first conductivity type which is formed in said high resistance semiconductor layer; a source layer of the second conductivity type which is formed on said high resistance semiconductor layer and a channel region, said channel region being formed in said base layer between said high resistance semiconductor layer and said source layer; a source electrode ohmic-contacting said source layer and said base layer; and a drain electrode formed on said second surface of said semiconductor substrate; wherein when a total channel width within a unit area (1 cm 2 ) of an active region is W(μm), an area of the high resistance layer which is formed beneath the gate electrode and is in direct contact with the gate insulating film within said unit area of the active region is SG(μm), a perimeter of said area SG within said unit area of the active region is T(μm), a channel length is l(μm) and a thickness of said gate insulating film is d(μm), a condition (W·SG)/(T·l·d)<1.46×10 8 is satisfied.
Claim 2
Dependent Claim
222 words
A conductivity modulated metal oxide semiconductor field effective transistor, comprising: a semiconductor substrate of a first conductivity type which has first and second surfaces; a high resistance semiconductor layer of a second conductivity type which is formed on said first surface of said semiconductor substrate and has a high resistance; a base layer of the first conductivity type which is formed in said high resistance semiconductor layer; a source layer of the second conductivity type which is formed on said high resistance semiconductor layer and a channel region, said channel region being formed in said base layer between said high resistance semiconductor layer and said source layer; a source electrode ohmic-contacting said source layer and said base layer; and a drain electrode formed on said second surface of said semiconductor substrate; wherein when a total channel width within a unit area (1 cm 2 ) of an active region is W(μm), an area of the high resistance layer which is formed beneath the gate electrode and is in direct contact with the gate insulating film within said unit area of the active region is SG(μm), a perimeter of said area SG within said unit area of the active region is T(μm), a channel length is l(μm) and a thickness of said gate insulating film is d(μm), a condition (W·SG)/(T·l·d)<1.46×10 8 is satisfied.
Claim 3
Dependent Claim
24 words
The transistor according to claim 1, wherein portions of said high resistance semiconductor layer are surrounded by said base layer to constitute island regions.
Claim 4
Dependent Claim
12 words
The transistor according to claim 2, wherein said portions have rectangular shapes.
Claim 5
Dependent Claim
54 words
The transistor according to claim 2, wherein said gate electrode comprises a polycrystalline silicon film formed to cover said island regions and a metal film formed on a portion of said polycrystalline of silicon film, said base layer of the first conductivity type being formed under said metal film to isolate said island regions.
Claim 6
Dependent Claim
26 words
The transistor according to claim 1, wherein a lifetime killer is introduced in said high resistance semiconductor layer to decrease a saturation current of said transistor.
Claim 7
Dependent Claim
24 words
The transistor according to claim 3, wherein portions of said high resistance semiconductor layer are surrounded by said base layer to constitute island regions.
Claim 8
Dependent Claim
20 words
The transistor according to claim 6, wherein said fourth surface of said high resistance semiconductor layer has a rectangular shape.
Claim 9
Dependent Claim
50 words
The transistor according to claim 6, wherein said gate electrode comprises a polycrystalline silicon film formed to cover said island region and a metal film formed on said polycrystalline silicon film, said base layer of the first conductivity type being formed under said metal film to isolate said island region.
Claim 10
Dependent Claim
12 words
The transistor according to claim 1, wherein condition (W·SG)/(T·l·d)<1.1×10 8 is satisfied.
Claim 11
Dependent Claim
23 words
The transistor according to claim 9, wherein portions of said high resistance semiconductor layer are surrounded by said layer to constitute island regions.
Claim 12
Dependent Claim
13 words
The transistor according to claim 10, wherein said island regions have rectangular shapes.
Claim 13
Dependent Claim
52 words
The transistor according to claim 10, wherein said gate electrode comprises a polycrystalline silicon film formed to cover said island regions and a metal film formed a portion of said polycrystalline silicon film, said base layer of the first conductivity type being formed under said metal film to isolate said island regions.
Claim 14
Dependent Claim
20 words
The transistor according to claim 1, wherein said channel region comprises a plurality of sections arranged orderly at regular intervals.
Claim 15
Dependent Claim
40 words
The transistor according to claim 10, comprising: a plurality of regions having an impurity concentration higher than that of said plurality of sections of said channel region, one of said plurality of regions being arranged between adjacent of said sections.
Claim 16
Dependent Claim
20 words
The transistor according to claim 5, wherein said channel region comprises a plurality of sections arranged orderly at regular intervals.
Claim 17
Dependent Claim
40 words
The transistor according to claim 15, comprising: a plurality of regions having an impurity concentration higher than that of said plurality of sections of said channel region, one of said plurality of regions being arranged between adjacent of said sections.
Claim 18
Dependent Claim
20 words
The transistor according to claim 9, wherein said channel region comprises a plurality of sections arranged orderly at regular intervals.
Claim 19
Dependent Claim
40 words
The transistor according to claim 17, comprising: a plurality of regions having an impurity concentration higher than that of said plurality of sections of said channel region, one of said plurality of regions being arranged between adjacent of said sections.
References Cited (Backward Citations)
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