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US4670890A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of and/or apparatus for encoding and decoding sequential information in data handling systems

Assignee: RESEARCH Corp 405 LEXINGTON AVENUE NEW YORK NY 10174 A NY NOT-FOR-PROFIT CORP
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Filing: 1984-03-01
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Granted: 1987-06-02
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Expires: 2004-03-01
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Abstract

Abstract The specification discloses a method and apparatus for encoding and decoding a variable length augmented code for use in the transmission of sequential information as an indefinite length string of data. Both binary and alternate character code sets are discussed for transmitting and translating information. The variable length code symbols are self synchronizing, and will automatically reestablish synchronization within two characters if a bit or number of bits is lost through noise or faulty transmission. The resynchronization is automatic and occurs by virtue of the construction of the variable length augmented codes. In addition, a method and means of creating a fixed length depleted code for use in digital processors and digital storage media is also disclosed. Inasmuch as most digital processors utilize fixed length words, it is desirable to be able to convert the variable length augmented code into a fixed length depleted code, and to be able to reconvert from the depleted code back to the augmented code without necessity of resorting to an extensive lookup table for each of the characters. In creating the augmented set of self synchronizing variable length code symbols, the original character set C 0 is augmented 9 times until the C q =2 q (n-1) +1 wherein n represents the number of distinct elements in the original character set C 0 that was augmented, and |C q | is equal to the number of symbols derived in the final augmented set C q , and is equal to or greater than the desired number of characters to be used in the data handling and communication.

Inventors

  • 👤 Mark Titchener

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-26 20:10
CPC Classifications
G; G11; G11B; G11B20/00; G11B20/10; G11B20/14; G11B20/1403; G11B20/1423; G11B20/1426; H; H04; H04L; H04L7/00; H04L7/04

Claims Analysis

Total Claims: 21
Claim 1
Independent Claim 183 words
A means for forming a set of self synchronizing variable length code symbols for use in sequential data handling, said means comprising: (a) input code means for receiving an original character set C 0 and subsequent character sets C 1 . . . to C q-1 to be augmented, (b) a means for repeating each of the character sets C 0 . . . to C q-1 twice to form a plurality of character lists having a first half and a second half which duplicates the first half, (c) a buffer means for buffering each selected input code in turn, (d) prefixing processor means for deleting a character in said first half and for prefixing said deleted character to each character symbol in said second half, (e) control logic means for sequencing said input code means, said buffer means for said prefixing processor q times to form a variable length augmented code of |C q |=2 q (n-1)+1 wherein n represents the number of symbols in the original character set, and |C q | represents the number of variable length augmented code symbols.
Claim 2
Dependent Claim 183 words
A means for forming a set of self synchronizing variable length code symbols for use in sequential data handling, said means comprising: (a) input code means for receiving an original character set C 0 and subsequent character sets C 1 . . . to C q-1 to be augmented, (b) a means for repeating each of the character sets C 0 . . . to C q-1 twice to form a plurality of character lists having a first half and a second half which duplicates the first half, (c) a buffer means for buffering each selected input code in turn, (d) prefixing processor means for deleting a character in said first half and for prefixing said deleted character to each character symbol in said second half, (e) control logic means for sequencing said input code means, said buffer means for said prefixing processor q times to form a variable length augmented code of |C q |=2 q (n-1)+1 wherein n represents the number of symbols in the original character set, and |C q | represents the number of variable length augmented code symbols.
Claim 3
Dependent Claim 41 words
A means for forming a set of self synchronizing variable length code symbols as claimed in claim 1, wherein said input means, said buffer means and said prefixing processor means are digital devices and said character set C 0 is binary.
Claim 4
Dependent Claim 46 words
A means for forming a set of self synchronizing variable length code symbols as claimed in claim 2, wherein said means further includes a storage means for storing at least 129 variable length symbols, 128 of which are addressable as code symbols for the ASCII code.
Claim 5
Dependent Claim 26 words
A means for forming a set of self synchronizing variable length code symbols as claimed in claim 3, wherein said storage means is a lookup table.
Claim 6
Dependent Claim 26 words
A means for forming a set of self synchronizing variable length code symbols as claimed in claim 3, wherein said storage means is a data array.
Claim 7
Dependent Claim 147 words
A digital coding means for creating variable length code symbols for use in data communications handling, said means comprising: (a) a data buffer means for receiving a source code having a plurality of characters to be encoded, (b) a data storage means for storing a plurality of self synchronizing variable length augmented binary code symbols, C q , wherein |C q | is equal to or greater than the number of characters N present in said source code, said binary code having been augmented q times until |C.sup.q |=2.sup.q +1≧N, (c) a means for selecting a predetermined variable length code from said data storage means in response to the receipt of a single source code character at said buffer, (d) a means for assembling and sending the augmented variable length code symbols which represent data to be transmitted as an indefinite length string of sequential binary data.
Claim 8
Dependent Claim 147 words
A digital coding means for creating variable length code symbols for use in data communications handling, said means comprising: (a) a data buffer means for receiving a source code having a plurality of characters to be encoded, (b) a data storage means for storing a plurality of self synchronizing variable length augmented binary code symbols, C q , wherein |C q | is equal to or greater than the number of characters N present in said source code, said binary code having been augmented q times until |C.sup.q |=2.sup.q +1≧N, (c) a means for selecting a predetermined variable length code from said data storage means in response to the receipt of a single source code character at said buffer, (d) a means for assembling and sending the augmented variable length code symbols which represent data to be transmitted as an indefinite length string of sequential binary data.
Claim 9
Dependent Claim 19 words
A digital coding means as claimed in claim 6, wherein said data storage means is a ROM lookup table.
Claim 10
Dependent Claim 18 words
A digital coding means as claimed in claim 6, wherein said data storage means is a data array.
Claim 11
Dependent Claim 17 words
A digital coding means as claimed in claim 6, wherein said source code comprises the ASCII characters.
Claim 12
Dependent Claim 21 words
A digital coding means as claimed in claim 6, wherein said source code comprises the Extended Binary-Coded Decimal Interchange Code (EBCDIC).
Claim 13
Dependent Claim 221 words
A means for forming depleted fixed length code symbols for data storage and manipulation wherein said fixed length symbols may be readily converted to self synchronization variable length symbols, said means comprising: (a) a means for listing a plurality of binary symbols S of (m+1) length in numerically ascending order, wherein 2 m +1 is equal to or greater than the number of characters to be used in said data storage and manipulation, (b) processor means for selectively deleting individual binary symbols from said list S, (c) first control means for repetitively partitioning the list S into 2 m-k groups of 2 k+1 symbols, wherein k represents the number of repetitions completed beginning at 0, said first control means repeating said partitioning step m times until k equals m, (d) a means for designating one of the 2 k+1 symbols in the first of said 2 m-k groups of symbols, as a symbol to be deleted by said processor means, (e) a second control means for designating corresponding symbols in odd numbered alternate groups of symbols to be deleted by said processor means, said second control means designating additional symbols to be deleted with each partition by said first control means, (f) a means for storing said depleted fixed length symbols wherein the length of the fixed length symbol is m+1.
Claim 14
Dependent Claim 221 words
A means for forming depleted fixed length code symbols for data storage and manipulation wherein said fixed length symbols may be readily converted to self synchronization variable length symbols, said means comprising: (a) a means for listing a plurality of binary symbols S of (m+1) length in numerically ascending order, wherein 2 m +1 is equal to or greater than the number of characters to be used in said data storage and manipulation, (b) processor means for selectively deleting individual binary symbols from said list S, (c) first control means for repetitively partitioning the list S into 2 m-k groups of 2 k+1 symbols, wherein k represents the number of repetitions completed beginning at 0, said first control means repeating said partitioning step m times until k equals m, (d) a means for designating one of the 2 k+1 symbols in the first of said 2 m-k groups of symbols, as a symbol to be deleted by said processor means, (e) a second control means for designating corresponding symbols in odd numbered alternate groups of symbols to be deleted by said processor means, said second control means designating additional symbols to be deleted with each partition by said first control means, (f) a means for storing said depleted fixed length symbols wherein the length of the fixed length symbol is m+1.
Claim 15
Dependent Claim 201 words
A means for forming self synchronizing variable length code symbols from a set of predefined and depleted fixed length code symbols, said means comprising: (a) an input buffer means for receiving each fixed length symbol to be converted to variable length symbols wherein the length of the fixed length code is m+1, (b) an indexing means for transferring the least significant bit from the fixed length code to the variable length code, said indexing means then sequentially reviewing each remaining bit beyond the least significant bit in order of significance, (c) a comparator means for receiving each remaining bit beyond said least significant bit from said indexing means, said comparator means comparing each sequential bit to a preselected bit and signalling when a match is found, (d) a storage means for storing m prefix codes, (e) a processor means for selecting a predefined, prefix code for each match found by said comparator means, the prefix code selected being determined by the relative position of the matched bit in the fixed length symbol, said processor means then sequentially adding each selected prefix to the least significant bit, whereby a self synchronizing variable length code is assembled for each fixed length code symbol.
Claim 16
Dependent Claim 201 words
A means for forming self synchronizing variable length code symbols from a set of predefined and depleted fixed length code symbols, said means comprising: (a) an input buffer means for receiving each fixed length symbol to be converted to variable length symbols wherein the length of the fixed length code is m+1, (b) an indexing means for transferring the least significant bit from the fixed length code to the variable length code, said indexing means then sequentially reviewing each remaining bit beyond the least significant bit in order of significance, (c) a comparator means for receiving each remaining bit beyond said least significant bit from said indexing means, said comparator means comparing each sequential bit to a preselected bit and signalling when a match is found, (d) a storage means for storing m prefix codes, (e) a processor means for selecting a predefined, prefix code for each match found by said comparator means, the prefix code selected being determined by the relative position of the matched bit in the fixed length symbol, said processor means then sequentially adding each selected prefix to the least significant bit, whereby a self synchronizing variable length code is assembled for each fixed length code symbol.
Claim 17
Dependent Claim 150 words
A digital coding means for creating a set of self synchronizing variable length code symbols for use in data handling, said means comprising: (a) a data buffer means for receiving a source code having a plurality of characters N to be encoded, (b) a data storage means for storing a plurality of self synchronizing variable length augmented code symbols C q , wherein C q is equal or greater than the number of characters N present in the source code, said code symbols having been augmented q times from a base set C 0 having n characters, wherein |C.sup.q |=2.sup.q (n-1)+1 N (c) a means for selecting a predetermined variable length code symbol from said data storage means in response to the receipt of a single source character at said data buffer, (d) a means for assembling and outputting the variable length augmented code as a string of sequential data.
Claim 18
Dependent Claim 150 words
A digital coding means for creating a set of self synchronizing variable length code symbols for use in data handling, said means comprising: (a) a data buffer means for receiving a source code having a plurality of characters N to be encoded, (b) a data storage means for storing a plurality of self synchronizing variable length augmented code symbols C q , wherein C q is equal or greater than the number of characters N present in the source code, said code symbols having been augmented q times from a base set C 0 having n characters, wherein |C.sup.q |=2.sup.q (n-1)+1 N (c) a means for selecting a predetermined variable length code symbol from said data storage means in response to the receipt of a single source character at said data buffer, (d) a means for assembling and outputting the variable length augmented code as a string of sequential data.
Claim 19
Independent Claim 172 words
A method of transmitting data using a digital handling means having encoding means, channel means and decoding means, said method comprising: (a) inputting a source code into a memory means in said encoding means, said source code including a character set having n distinct characters, (b) converting the source code into a variable length augmented code, wherein said conversion includes augmenting the character set within said memory means a predetermined number of times, each of said augmentation steps including: (i) repeating the existing character set in memory to form a new character set having a first half and a second half which duplicates the first half, (ii) identifying a selected character from said first half of said new character set, and (iii) prefixing each character of said second half with said selected character and deleting said selected character from said first half (c) transmitting said variable length augmented code over said channel means to said decoding means; (d) restoring the variable length augmented code to said source code in said decoding means.
Claim 20
Independent Claim 172 words
A method of transmitting data using a digital handling means having encoding means, channel means and decoding means, said method comprising: (a) inputting a source code into a memory means in said encoding means, said source code including a character set having n distinct characters, (b) converting the source code into a variable length augmented code, wherein said conversion includes augmenting the character set within said memory means a predetermined number of times, each of said augmentation steps including: (i) repeating the existing character set in memory to form a new character set having a first half and a second half which duplicates the first half, (ii) identifying a selected character from said first half of said new character set, and (iii) prefixing each character of said second half with said selected character and deleting said selected character from said first half (c) transmitting said variable length augmented code over said channel means to said decoding means; (d) restoring the variable length augmented code to said source code in said decoding means.
Claim 21
Dependent Claim 28 words
The method of transmitting data according to claim 14 wherein the number of symbols within said augmented character set after q augmentations is equal to 2 q (n-1)+1.

References Cited (Backward Citations)

US3716851A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1990-06-01 1990-12-01 1991-06-02 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1994-06-01 1994-12-01 1995-06-02 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1998-06-01 1998-12-01 1999-06-02 $7700.00 Window Closed / Lapsed

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