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US4665523A Expired / Lapsed US ⏱️ 0.0 years remaining

Method and means for error detection and correction in high speed data transmission codes

Assignee: Leland Stanford Junior University
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Filing: 1984-02-15
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Granted: 1987-05-12
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Expires: 2004-02-15
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Abstract

Abstract A method and processing matrix for detection and correction of errors in coded data based on determining the error location and error evaluator polynomials using the relationship defined by the key equation. A systolic processor is disclosed which utilizes pipelining and a regular, parallel structure based on a derived algorithm for solving the key equation.

Inventors

  • 👤 Todd K. Citron
  • 👤 Thomas Kailath

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 07:49
CPC Classifications
G; G06; G06F; G06F7/00; G06F7/60; G06F7/72; G06F7/724; H; H03; H03M; H03M13/00; H03M13/03; H03M13/033; H03M13/05; H03M13/13; H03M13/15; H03M13/151

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 59 words
A method of identifying and correcting errors in coded data comprising the steps of computing syndromes (s) from said coded data, computing error location and error evaluator polynomials from said syndrome using the algorithm: ##EQU72## computing error locations and magnitudes based on the roots of said polynomials, and correcting the errors based on the computed error locations and magnitudes.
Claim 2
Independent Claim 59 words
A method of identifying and correcting errors in coded data comprising the steps of computing syndromes (s) from said coded data, computing error location and error evaluator polynomials from said syndrome using the algorithm: ##EQU72## computing error locations and magnitudes based on the roots of said polynomials, and correcting the errors based on the computed error locations and magnitudes.
Claim 3
Dependent Claim 82 words
A processor for computing error location and error evaluator polynomials based on syndromes computed from coded data comprising a plurality of control cells for computing control signals, γ i , and passing the control signal and data to computer cells, a plurality of computation cells for performing recursive operations on said data, said plurality of control cells and said plurality of computation cells being organized as a pipelined systolic array of processing cells (FIG. 9) in accordance with the following algorithm: ##EQU73##
Claim 4
Dependent Claim 82 words
A processor for computing error location and error evaluator polynomials based on syndromes computed from coded data comprising a plurality of control cells for computing control signals, γ i , and passing the control signal and data to computer cells, a plurality of computation cells for performing recursive operations on said data, said plurality of control cells and said plurality of computation cells being organized as a pipelined systolic array of processing cells (FIG. 9) in accordance with the following algorithm: ##EQU73##
Claim 5
Independent Claim 61 words
A method of identifying and correcting errors in coded data comprising the steps of (1) computing syndromes (s) from said coded data, (2) computing error location and error evaluator polynomials from said syndrome using the algorithm: ##EQU74## computing error locations and magnitudes based on the roots of said polynomials, and correcting the errors based on the computed error locations and magnitudes.
Claim 6
Independent Claim 61 words
A method of identifying and correcting errors in coded data comprising the steps of (1) computing syndromes (s) from said coded data, (2) computing error location and error evaluator polynomials from said syndrome using the algorithm: ##EQU74## computing error locations and magnitudes based on the roots of said polynomials, and correcting the errors based on the computed error locations and magnitudes.
Claim 7
Dependent Claim 86 words
A processor for computing error location and error evaluator polynomials based on syndromes computed from coded data comprising a plurality of control cells (FIGS. 6, 12) for computing control signals, γ i , and passing the control signal and data to computation cells, a plurality of computation cells (FIGS. 7, 13) for performing recursive operations on said data, said plurality of control cells and said plurality of computation cells being organized as a pipelined systolic array of processing cells in accordance with the following algorithm: ##EQU75##
Claim 8
Dependent Claim 86 words
A processor for computing error location and error evaluator polynomials based on syndromes computed from coded data comprising a plurality of control cells (FIGS. 6, 12) for computing control signals, γ i , and passing the control signal and data to computation cells, a plurality of computation cells (FIGS. 7, 13) for performing recursive operations on said data, said plurality of control cells and said plurality of computation cells being organized as a pipelined systolic array of processing cells in accordance with the following algorithm: ##EQU75##

References Cited (Backward Citations)

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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1990-05-11 1990-11-10 1991-05-12 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1994-05-11 1994-11-10 1995-05-12 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1998-05-11 1998-11-10 1999-05-12 $7700.00 Window Closed / Lapsed

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