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US4663587A Expired / Lapsed US ⏱️ 0.0 years remaining

Electronic circuit for measuring electrical energy

Assignee: ABB Inc USA
•
Filing: 1985-10-02
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Granted: 1987-05-05
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Expires: 2005-10-02
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Abstract

Abstract A shift register is utilized to provide a 90° delay in a pulse width modulated current signal to determine volt-amperes reactive. The shift register is associated with a clock that provides a preselected frequency that, in combination with the number of stages in the shift register, delays the pulse width modulated current signal by an amount equivalent to one-quarter period of the current waveform in the metered circuit. After delaying the pulse width modulated signal by 90°, the shifted signal is multiplied by a voltage signal that represents the voltage in the metered circuit and the resulting product signal is input to a voltage-to-frequency converter.

Inventors

  • 👤 Raymond W. MacKenzie

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-24 15:42
CPC Classifications
G; G01; G01R; G01R21/00; G01R21/06; G01R21/127; G01R21/1271

Claims Analysis

Total Claims: 12
Claim 1
Independent Claim 183 words
A metering apparatus, comprising: current input means for providing a signal that is proportional to the time derivative of an alternating current in a circuit; first clock means for providing a first series of clock pulses, said first series of clock pulses having a generally constant frequency; integrating means for modulating said series of clock pulses with said signal that is proportional to said time derivative of said current, said integrating means being connected to said current input means and said first clock means, the output of said integrating means being a first pulse width modulated signal; means for delaying said first pulse modulated signal by a predetermined amount of time, the output of said delaying means being a second pulse width modulated signal; second clock means for providing a second series of clock pulses, said second clock means having an output connected to said delaying means, said second series of clock pulses having a variable frequency, said second clock means being configured to vary said variable frequency according to a preselected relationship with the frequency of said alternating current in said circuit;
Claim 2
Dependent Claim 183 words
A metering apparatus, comprising: current input means for providing a signal that is proportional to the time derivative of an alternating current in a circuit; first clock means for providing a first series of clock pulses, said first series of clock pulses having a generally constant frequency; integrating means for modulating said series of clock pulses with said signal that is proportional to said time derivative of said current, said integrating means being connected to said current input means and said first clock means, the output of said integrating means being a first pulse width modulated signal; means for delaying said first pulse modulated signal by a predetermined amount of time, the output of said delaying means being a second pulse width modulated signal; second clock means for providing a second series of clock pulses, said second clock means having an output connected to said delaying means, said second series of clock pulses having a variable frequency, said second clock means being configured to vary said variable frequency according to a preselected relationship with the frequency of said alternating current in said circuit;
Claim 3
Dependent Claim 87 words
voltage input means for providing a signal that is proportional to the voltage of said circuit; first multiplier means for providing a signal that is proportional to the product of said second pulse width modulated signal and said signal that is proportional to the voltage of said circuit, said first multiplier means being connected to the output of said delaying means and the output of said voltage input means; and wherein the output of said first multiplier means is proportional to the volt-amperes reactive of said circuit.
Claim 4
Dependent Claim 87 words
voltage input means for providing a signal that is proportional to the voltage of said circuit; first multiplier means for providing a signal that is proportional to the product of said second pulse width modulated signal and said signal that is proportional to the voltage of said circuit, said first multiplier means being connected to the output of said delaying means and the output of said voltage input means; and wherein the output of said first multiplier means is proportional to the volt-amperes reactive of said circuit.
Claim 5
Dependent Claim 13 words
The apparatus of claim 1, wherein: said delaying means comprises a shift register.
Claim 6
Dependent Claim 25 words
The apparatus of claim 1, wherein: said predetermined amount of time is equivalent to one-fourth of the period of one cycle of said alternating current.
Claim 7
Dependent Claim 15 words
The apparatus of claim 1, wherein: said second clock means comprises a phase locked loop.
Claim 8
Dependent Claim 50 words
The apparatus of claim 1, further comprising: a first voltage-to-frequency converter connected to said first multiplier means, said first voltage-to-frequency converter providing an output signal comprising a first plurality of pulses, each of said first plurality of pulses from said first voltage-to-frequency converter representing a predetermined quantity of volt-amperes reactance.
Claim 9
Dependent Claim 36 words
The apparatus of claim 5, further comprising: a first counter connected to said first voltage-to-frequency converter, said first counter being configured to accumulate a count of said first plurality of pulses from said first voltage-to-frequency converter.
Claim 10
Dependent Claim 76 words
The apparatus of claim 1, further comprising: second multiplier means for providing a signal that is proportional to the product of said first pulse width modulated signal and said signal that is proportional to the voltage of said circuit, said second multiplier means being connected to the output of said integrating means and the output of said voltage input means; and wherein the output of said second multiplier means is proportional to watts of said circuit.
Claim 11
Dependent Claim 49 words
The apparatus of claim 7, further comprising: a second voltage-to-frequency converter connected to said second multiplier means, said second voltage-to-frequency converter providing an output signal comprising a second plurality of pulses, each of said second plurality of pulses from said second voltage-to-frequency converter representing a predetermined quantity of watts.
Claim 12
Dependent Claim 35 words
The apparatus of claim 8, further comprising: a second counter connected to said second voltage-to-frequency converter, said counter being configured to accumulate a count of said second plurality of pulses from said second voltage-to-frequency converter.

References Cited (Backward Citations)

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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1990-05-04 1990-11-03 1991-05-05 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1994-05-04 1994-11-03 1995-05-05 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1998-05-04 1998-11-03 1999-05-05 $7700.00 Window Closed / Lapsed

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