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US4663545A Expired / Lapsed US ⏱️ 0.0 years remaining

High speed state machine

Assignee: Motorola Solutions Inc
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Filing: 1984-11-15
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Granted: 1987-05-05
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Expires: 2004-11-15
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Abstract

Abstract A state machine in which the next state signals are biased by the next state encoder very close to the switch voltage of the input transistors of the present state latches to improve the response time of the state machine. Charge sharing on the outputs of the next state selector is prevented from affecting the biased next state signals by voltage substaining circuitry. By pre-encoding input signals pertinent to each state using separate input logic, the size of the next state selector is minimized, further improving the response time of the state machine. Selected present state latches may be prevented from changing state by gating the next state signals.

Inventors

  • 👤 Joseph Pumo
  • 👤 William D. Atwell, Jr.
  • 👤 Doyle V. McAlister

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 12:15
CPC Classifications
G; G11; G11C; G11C8/00; G11C8/08; H; H03; H03K; H03K3/00; H03K3/01; H03K3/012; H03K3/02; H03K3/353; H03K3/356; H03K3/356069; H03K3/356078

Claims Analysis

Total Claims: 12
Claim 1
Independent Claim 332 words
In a state machine comprising: a present state latch, responsive to the voltage of a next state signal relative to a predetermined switch voltage, for storing the state of the next state signal in response to a first clock signal, the present state latch providing a present state signal in response to a second clock signal, the present state signal having a state related to the state of the stored next state signal; a present state decoder, responsive to the state of the present state signal provided by the present state latch, for providing a present state control signal in response to the first clock signal, the present state control signal having a state related to the state of the present state signal; a next state selector, responsive to the state of the present state control signal provided by the present state decoder and at least a first input signal generated externally to the state machine, for providing a next state select signal in response to the first clock signal, the next state select signal having a state related to a predetermined logical combination of the states of the present state control signal and the first input signal, the next state selector thereafter forcing the next state select signal to a predetermined state in response to the second clock signal; and a next state encoder, responsive to the state of the next state select signal provided by the next state selector, for providing the next state signal to the present state latch in response to the first clock signal, the next state signal having a state related to the state of the next state select signal, the next state encoder thereafter forcing the next state signal to a predetermined initial voltage relative to the predetermined switch voltage in response to the second clock signal; the improvement comprising: control means, in the next state encoder, for establishing the initial voltage relatively close to said switch voltage, in response to said second clock signal.
Claim 2
Dependent Claim 332 words
In a state machine comprising: a present state latch, responsive to the voltage of a next state signal relative to a predetermined switch voltage, for storing the state of the next state signal in response to a first clock signal, the present state latch providing a present state signal in response to a second clock signal, the present state signal having a state related to the state of the stored next state signal; a present state decoder, responsive to the state of the present state signal provided by the present state latch, for providing a present state control signal in response to the first clock signal, the present state control signal having a state related to the state of the present state signal; a next state selector, responsive to the state of the present state control signal provided by the present state decoder and at least a first input signal generated externally to the state machine, for providing a next state select signal in response to the first clock signal, the next state select signal having a state related to a predetermined logical combination of the states of the present state control signal and the first input signal, the next state selector thereafter forcing the next state select signal to a predetermined state in response to the second clock signal; and a next state encoder, responsive to the state of the next state select signal provided by the next state selector, for providing the next state signal to the present state latch in response to the first clock signal, the next state signal having a state related to the state of the next state select signal, the next state encoder thereafter forcing the next state signal to a predetermined initial voltage relative to the predetermined switch voltage in response to the second clock signal; the improvement comprising: control means, in the next state encoder, for establishing the initial voltage relatively close to said switch voltage, in response to said second clock signal.
Claim 3
Dependent Claim 45 words
The state machine of claim 1 further comprising: sustaining means, in the next state encoder, for sustaining the initial voltage established on the next state signal by the control means relatively close to said switch voltage in the absence of the next state select signal.
Claim 4
Dependent Claim 30 words
The state machine of claim 1 further comprising: means, in the present state latch, for preventing the next state signal from affecting the state stored in the present state latch.
Claim 5
Dependent Claim 52 words
The state machine of claim 1 further comprising: means, in the next state encoder and responsive to a second input signal generated externally to the state machine, for providing a second next state signal to the present state latch independent of the next state select signal provided by the next state selector.
Claim 6
Dependent Claim 58 words
The state machine of claim 1 further comprising: logic means, responsive to the present state control signal and to a second input signal generated externally to the state machine, for logically combining the second input signal and the present state control signal and providing the resultant signal to the next state input logic as the first input signal.
Claim 7
Dependent Claim 335 words
In a state machine comprising: a present state latch, responsive to the voltage of a next state signal relative to a predetermined switch voltage, for storing the state of the next state signal in response to a first clock signal, the present state latch providing a present state signal in response to a second clock signal, the present state signal having a state related to the state of the stored next state signal; a present state decoder, responsive to the state of the present state signal provided by the present state latch, for providing a present state control signal in response to the first clock signal, the present state control signal having a state related to the state of the present state signal; a next state selector, responsive to the state of the present state control signal provided by the present state decoder and at least a first input signal generated externally to the state machine, for providing a next state select signal in response to the first clock signal, the next state select signal having a state related to a predetermined logical combination of the states of the present state control signal and the first input signal, the next state selector thereafter forcing the next state select signal to a predetermined state in response to the second clock signal; and a next state encoder, responsive to the state of the next state select signal provided by the next state selector, for providing the next state signal to the present state 1atch in response to the first clock signal, the next state signal having a state related to the state of the next state select signal, the next state encoder thereafter forcing the next state signal to a predetermined initial voltage relative to the predetermined switch voltage in response to the second clock signal; the improvement comprising: means, in the present state latch, for preventing the next state signal from affecting the state stored in the present state latch in response to a control signal.
Claim 8
Dependent Claim 335 words
In a state machine comprising: a present state latch, responsive to the voltage of a next state signal relative to a predetermined switch voltage, for storing the state of the next state signal in response to a first clock signal, the present state latch providing a present state signal in response to a second clock signal, the present state signal having a state related to the state of the stored next state signal; a present state decoder, responsive to the state of the present state signal provided by the present state latch, for providing a present state control signal in response to the first clock signal, the present state control signal having a state related to the state of the present state signal; a next state selector, responsive to the state of the present state control signal provided by the present state decoder and at least a first input signal generated externally to the state machine, for providing a next state select signal in response to the first clock signal, the next state select signal having a state related to a predetermined logical combination of the states of the present state control signal and the first input signal, the next state selector thereafter forcing the next state select signal to a predetermined state in response to the second clock signal; and a next state encoder, responsive to the state of the next state select signal provided by the next state selector, for providing the next state signal to the present state 1atch in response to the first clock signal, the next state signal having a state related to the state of the next state select signal, the next state encoder thereafter forcing the next state signal to a predetermined initial voltage relative to the predetermined switch voltage in response to the second clock signal; the improvement comprising: means, in the present state latch, for preventing the next state signal from affecting the state stored in the present state latch in response to a control signal.
Claim 9
Dependent Claim 351 words
In a state machine comprising: a present state latch, responsive to the voltage of a next state signal relative to a predetermined switch voltage, for storing the state of the next state signal in response to a first clock signal, the present state latch providing a present state signal in response to a second clock signal, the present state signal having a state related to the state of the stored next state signal; a present state decoder, responsive to the state of the present state signal provided by the present state latch, for providing a present state control signal in response to the first clock signal, the present state control signal having a state related to the state of the present state signal; a next state selector, responsive to the state of the present state control signal provided by the present state decoder and at least a first input signal generated externally to the state machine, for providing a next state select signal in response to the first clock signal, the next state select signal having a state related to a predetermined logical combination of the states of the present state control signal and the first input signal, the next state selector thereafter forcing the next state select signal to a predetermined state in response to the second clock signal; and a next state encoder, responsive to the state of the next state select signal provided by the next state selector, for providing the next state signal to the present state latch in response to the first clock signal, the next state signal having a state related to the state of the next state select signal, the next state encoder thereafter forcing the next state signal to a predetermined initial voltage relative to the predetermined switch voltage in response to the second clock signal; the improvement comprising: means, in the next state encoder and responsive to a second input signal generated externally to the state machine, for providing a second next state signal to the present state latch independent of the next state select signal provided by the next state selector.
Claim 10
Dependent Claim 351 words
In a state machine comprising: a present state latch, responsive to the voltage of a next state signal relative to a predetermined switch voltage, for storing the state of the next state signal in response to a first clock signal, the present state latch providing a present state signal in response to a second clock signal, the present state signal having a state related to the state of the stored next state signal; a present state decoder, responsive to the state of the present state signal provided by the present state latch, for providing a present state control signal in response to the first clock signal, the present state control signal having a state related to the state of the present state signal; a next state selector, responsive to the state of the present state control signal provided by the present state decoder and at least a first input signal generated externally to the state machine, for providing a next state select signal in response to the first clock signal, the next state select signal having a state related to a predetermined logical combination of the states of the present state control signal and the first input signal, the next state selector thereafter forcing the next state select signal to a predetermined state in response to the second clock signal; and a next state encoder, responsive to the state of the next state select signal provided by the next state selector, for providing the next state signal to the present state latch in response to the first clock signal, the next state signal having a state related to the state of the next state select signal, the next state encoder thereafter forcing the next state signal to a predetermined initial voltage relative to the predetermined switch voltage in response to the second clock signal; the improvement comprising: means, in the next state encoder and responsive to a second input signal generated externally to the state machine, for providing a second next state signal to the present state latch independent of the next state select signal provided by the next state selector.
Claim 11
Dependent Claim 356 words
In a state machine comprising: a present state latch, responsive to the voltage of a next state signal relative to a predetermined switch voltage, for storing the state of the next state signal in response to a first clock signal, the present state latch providing a present state signal in response to a second clock signal, the present state signal having a state related to the state of the stored next state signal; a present state decoder, responsive to the state of the present state signal provided by the present state latch, for providing a present state control signal in response to the first clock signal, the present state control signal having a state related to the state of the present state signal; a next state selector, responsive to the state of the present state control signal provided by the present state decoder and at least a first input signal generated externally to the state machine, for providing a next state select signal in response to the first clock signal, the next state select signal having a state related to a predetermined logical combination of the states of the present state control signal and the first input signal, the next state selector thereafter forcing the next state select signal to a predetermined state in response to the second clock signal; and a next state encoder, responsive to the state of the next state select signal provided by the next state selector, for providing the next state signal to the present state latch in response to the first clock signal, the next state signal having a state related to the state of the next state select signal, the next state encoder thereafter forcing the next state signal to a predetermined initial voltage relative to the predetermined switch voltage in response to the second clock signal; the improvement comprising: logic means, responsive to the present state control signal and to a second input signal generated externally to the state machine, for logically combining the second input signal and the present state control signal and providing the resultant signal to the next state selector as the first input signal.
Claim 12
Dependent Claim 356 words
In a state machine comprising: a present state latch, responsive to the voltage of a next state signal relative to a predetermined switch voltage, for storing the state of the next state signal in response to a first clock signal, the present state latch providing a present state signal in response to a second clock signal, the present state signal having a state related to the state of the stored next state signal; a present state decoder, responsive to the state of the present state signal provided by the present state latch, for providing a present state control signal in response to the first clock signal, the present state control signal having a state related to the state of the present state signal; a next state selector, responsive to the state of the present state control signal provided by the present state decoder and at least a first input signal generated externally to the state machine, for providing a next state select signal in response to the first clock signal, the next state select signal having a state related to a predetermined logical combination of the states of the present state control signal and the first input signal, the next state selector thereafter forcing the next state select signal to a predetermined state in response to the second clock signal; and a next state encoder, responsive to the state of the next state select signal provided by the next state selector, for providing the next state signal to the present state latch in response to the first clock signal, the next state signal having a state related to the state of the next state select signal, the next state encoder thereafter forcing the next state signal to a predetermined initial voltage relative to the predetermined switch voltage in response to the second clock signal; the improvement comprising: logic means, responsive to the present state control signal and to a second input signal generated externally to the state machine, for logically combining the second input signal and the present state control signal and providing the resultant signal to the next state selector as the first input signal.

References Cited (Backward Citations)

US3862435A Cited
US3876982A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1990-05-04 1990-11-03 1991-05-05 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1994-05-04 1994-11-03 1995-05-05 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1998-05-04 1998-11-03 1999-05-05 $7700.00 Window Closed / Lapsed

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