Video processor

Claim 2

A video processing method for varying the size of an input video image in a video frame represented by the time varying signals individually corresponding to successive lines of the frame, the method comprising the steps of: digitizing each of a plurality of said time varying signals at a plurality of predetermined intervals to generate a plurality of pixel values representing each signal individually at each interval of said plurality of pixel values; storing the pixel values for access as a two dimensional array with such values representing successive such lines stored along successive row vectors of the array and such values representing successive corresponding such intervals stored along successive column vectors of the array, so that the input image corresponds to a stored image in which such values occupy a plurality of adjacent such row vectors and occupy a plurality of adjacent elements along each such row vectors; perfiorming a plurality of first interpolations between a plurality of adjacent pixel values corresponding to each of a plurality of adjacent row vectors of such an array to generate pixel values representing a transformed video image in which, in such an array, the generated pixel values occupy adjacent row vectors equal in number to said plurality of adjacent row vectors and occupy a different number of adjacent elements along each row vector than said plurality of adjacent pixel values, so that said transformed image is varied in size from the input image in a direction along said lines; and performing a plurality of second interpolations between a plurality of adjacent pixel values corresponding to each of a plurality of adjacent column vectors of such an array to generate pixel values representing a transformed video image in which, in such an array, the generated pixel values occupy column vectors equal in number to said plurality of adjacent column vectors and occupy a different number of adjacent elements along each column vector than said plurality of adjacent pixel values, so that said transformed image is varied in size from the input image in a direction orthogonally related to said lines, so that, when pixel values representing the input image are so stored and said first plurality of interpolations and said second plurality thereof are performed, such an arrary is generated representing an output image varied in size from the input image; and wherein, in said method a transformed image is reduced in such a direction from the corresponding stored image so that along a first vector corresponding to such a direction there are more pixel values representing such stored image than there are pixel values representing the transformed image in a second vector correspondingly positioned in such an array to the first vector, and wherein the pixel values of the second vector are generated by performing a plurality of said interpolations according to the following steps, where L is the number of pixel values in the first vector which represent the stored image, N is the number of pixel values in the second vector which represent the transformed image, A is the first vector, B is the second vector, I is an index to the pixel values of the first vector, J is an index to the pixel values of the second vector, and F is an arbitrary index and the steps are: (A) setting I equal to a value specifying a first pixel value to be used from the first vector, setting J equal to a value specifying a first pixel value to be generated for the second vector, setting F equal to L, and setting B J equal zero; (B) when F is greater than or equal to N, determining B J as follow: B.sub.J =B.sub.J +N/L(A.sub.I) and proceeding to step (C), and when F is less than N determining B J and B J+1 as follows: B.sub.J =B.sub.J +N/L(F/N)(A.sub.I) B.sub.J+1 =N/A(1-F/N)(A.sub.I) then setting F and J as follows: F=F+L J=J+1 and the proceeding to step (C); (C) setting I and F as follows: I=I+1 F=F=N; and (D) when I is not equal to a value specifying a last pixel value to be used from the first vector, repeating steps (B) and (C).

Claim 3

A video processing method for varying the side of an input video image in a video frame represented by time varying signals individually corresponding to successive lines of the frame, the method comprising the steps of: digitizing each of a plurality of said time varying signals at a plurality of predetermined intervals to generate a plurality of pixel values representing each signal individually at each interval of said plurality of pixel values; storing the pixel values for access as a two dimensional array with such values representing successive such lines stored along successive row vectors of the array and such values representing successive corresponding such intervals stored along successive column vectors of the array, so that the input image corresponds to a stored image in which such values occupy a plurality of adjacent such row vectors and occupy a plurality of adjacent elements along each such row vectors; performing a plurality of first interpolations between a plurality of adjacent pixel values corresponding to each of a plurality of adjacent row vectors of such an array to generate pixel values representing a transformed video image in which, in such an array, the generated pixel values occupy adjacent row vectors equal in number to said plurality of adjacent row vectors and occupy a different number of adjacent elements along each row vector than said plurality of adjacent pixel values, so that said transformed image is varied in size from the input image in a direction along said lines; and performing a plurality of second interpolations between a plurality of adjacent pixel values corresponding to each of a plurality of adjacent column vectors of such an array to generate pixel values representing a transformed video image in which, in such an array, the generated pixel values occupy column vectors equal in number to said plurality of adjacent column vectors and occupy a different number of adjacent elements along each column vector than said plurality of adjacent pixel values, so that said transformed image is varied in size from the input image in a direction orthogonally related to said lines, so that, when pixel values representing the input image are so stored and said first plurality of interpolations and said second plurality thereof are performed, such an array is generated representing an output image varied in size from the input image; and wherein, in said method a transformed image is expanded in such a direction from the corresponding stored image so that along a first vector corresponding to such a direction there are fewer pixel values representing such stored image than there are pixel values representing the transformed image in a second vector correspondingly positioned in such an array to the first vector, and wherein the pixel values of the second vector are generated by performing a plurality of said interpolations according to the following steps, where L is the number of pixel values in the second vector which represent the transformed image, N is the number of pixel values in the first vector which represent the stored image, A is the first vector, B is the second vector, I is an index to the pixel values of the first vector, J is an index to the pixel values of the second vector, and F is an arbitrary index and the steps are: (A) setting I equal to a value specifying a first pixel value to be used from the first vector, setting J equal to a value specifying a first pixel value to be generated for the second vector, and setting F equal to L; (B) when F is greater than or equal to N determining B J as follows: B.sub.J =A.sub.I and proceeding to step (C), and when F is less than N determining B J as follows: B.sub.J =A.sub.I (F/N)+A.sub.I+1 (1-F/N) then setting I and F as follows: I=I+1 F=F+L and then proceeding to step (C); (C) setting J and F as follows: J=I+1 F=F-N; and (D) when J is not equal to a value specifying a last pixel value to be used from the second vector, repeating steps (B) and (C).

Claim 4

A video processing method for varying the side of an input video image in a video frame represented by time varying signals individually corresponding to successive lines of the frame, the method comprising the steps of: digitizing each of a plurality of said time varying signals at a plurality of predetermined intervals to generate a plurality of pixel values representing each signal individually at each interval of said plurality of pixel values; storing the pixel values for access as a two dimensional array with such values representing successive such lines stored along successive row vectors of the array and such values representing successive corresponding such intervals stored along successive column vectors of the array, so that the input image corresponds to a stored image in which such values occupy a plurality of adjacent such row vectors and occupy a plurality of adjacent elements along each such row vectors; performing a plurality of first interpolations between a plurality of adjacent pixel values corresponding to each of a plurality of adjacent row vectors of such an array to generate pixel values representing a transformed video image in which, in such an array, the generated pixel values occupy adjacent row vectors equal in number to said plurality of adjacent row vectors and occupy a different number of adjacent elements along each row vector than said plurality of adjacent pixel values, so that said transformed image is varied in size from the input image in a direction along said lines; and performing a plurality of second interpolations between a plurality of adjacent pixel values corresponding to each of a plurality of adjacent column vectors of such an array to generate pixel values representing a transformed video image in which, in such an array, the generated pixel values occupy column vectors equal in number to said plurality of adjacent column vectors and occupy a different number of adjacent elements along each column vector than said plurality of adjacent pixel values, so that said transformed image is varied in size from the input image in a direction orthogonally related to said lines, so that, when pixel values representing the input image are so stored and said first plurality of interpolations and said second plurality thereof are performed, such an array is generated representing an output image varied in size from the input image; and wherein, in said method a transformed image is expanded in such a direction from the corresponding stored image so that along a first vector corresponding to such a direction there are fewer pixel values representing such stored image than there are pixel values representing the transformed image in a second vector correspondingly positioned in such an array to the first vector, and wherein the pixel values of the second vector are generated by performing a plurality of said interpolations according to the following steps, where L is the number of pixel values in the second vector which represent the transformed image, N is the number of pixel values in the first vector which represent the stored image, A is the first vector, B is the second vector, I is an index to the pixel values of the first vector, J is an index to the pixel values of the second vector, and F is an arbitrary index and the steps are: (A) setting I equal to a value specifying a first pixel value to be used from the first vector, setting J equal to a value specifying a first pixel value to be generated for the second vector, and setting F equal to L; (B) when F is greater than or equal to N determining B J as follows: B.sub.J =A.sub.I and proceeding to step (C), and when F is less than N determining B J as follows: B.sub.J =A.sub.I (F/N)+A.sub.I+1 (1-F/N) then setting I and F as follows: I=I+1 F=F+L and then proceeding to step (C); (C) setting J and F as follows: J=I+1 F=F-N; and (D) when J is not equal to a value specifying a last pixel value to be used from the second vector, repeating steps (B) and (C).

Claim 5

A video processor for performing a separable two dimensional transform on images individual to successive input video frames to generate images individual to successive output video frames, each frame having successive video signals individually corresponding to parallel video lines of a first set thereof forming the image, the processor comprising: analog to digital converter means for successively receiving said video signals of each input frame and generating from each one of said video signals a predetermined number of pixel values representing said one signal at predetermined pixel time intervals equal in number to said predetermined number of pixel values, so that the pixel values generated at corresponding pixel time intervals of each of successive such video signals represent pixels of the image along a second set of parallel lines orthogonally related to the lines of the first set; first frame memory means, having a plurality of storage locations individual to said pixel values and addressable as a two dimensional array having orthogonally related rows and columns, for storing the successive pixel values corresponding to each line of the first set thereof of alternate input frames in succession in such storage locations along said rows with said rows corresponding individually to said lines, for storing the successive pixel values corresponding to each line of the first set thereof of the other input frames in succession in such storage locations along said columns with said columns corresponding individually to the lines of the first set, for outputting pixel values corresponding to said alternate input frames in succession from such storage locations along said columns, and for outputting pixel values corresponding to said other input frames in succession from such storage locations along said rows, so that the pixel values corresponding to each frame are stored by the first frame memory means successively along and in order of the lines of the first set and are output from the first memory means successively along and in order of the lines of the second set; second frame memory means, having a plurality of storage locations individual to said pixel values and addressable as a two dimensional array having orthogonally related rows and columns, for storing the successive pixel values corresponding to each line of the second set thereof of said alternate input frames in succession in such storage locations along said columns with said columns corresponding individually to said lines of the second set thereof, for storing the successive pixel values corresponding to each line of the second set thereof of said other input frames in succession in such location along said rows with the rows corresponding individually to lines of the second set thereof, for outputting pixel values corresponding to said alternate input frames in succession from such storage locations along said rows, and for outputting pixel values corresponding to said other frames in succession from such storage locations along said columns, so that the pixel values corresponding to each frame are output by the second memory means successively along and in order of the lines of the first set; first line processor means for receiving in succession pixel values corresponding to successive pixels along individual lines of the first set thereof of each input frame and for generating, from said values corresponding to adjacent pixels in accordance with relations between said adjacent pixels predetermined by said transform along the dimension corresponding to the lines of the first set thereof, first transformed pixel values of the corresponding lines of the first set thereof of each output frame; second line processor means for receiving in succession pixel values corresponding to successive pixels along individual lines of the second set thereof of each input frame and for generating, from said values corresponding to adjacent pixels of each such line and in accordance with relations between said adjacent pixels predetermined by said transform along the dimension corresponding to the lines of the second set thereof, second transformed pixel values of the corresponding lines of the second set thereof of each output frame; and digital to analog converter and signal restoration means for receiving in succession the pixel values of each line of the first set thereof of each output frame and for generating from said values video signals corresponding to the first set of lines of the output frame, wherein, in said video processor: the first line processor means receives pixel values directly and in succession from the analog to digital converter means as said pixel values are generated thereby; the first frame memory means receives pixel values directly and in succession from the first line processor means as said pixel values are output therefrom; the second line processor means receives pixel values directly and in succession from the first frame memory means as said pixel values are output therefrom; the second frame memory means receives pixel values directly and in succession from the second line processor means as said pixel values are generated thereby; the digital to analog converter and signal restoration means receives pixel values directly and in succession from the second frame memory means as said pixel values are output therefrom; wherein the input frames are associated with individual frame signals indicating the beginning of the frames and with line signals indicating the beginning of each line of the first set thereof; wherein the first frame memory means and the second frame memory means are each responsive in each of said predetermined pixel time intervals to a row address signal and to a column address signal for outputting, from a storage location uniquely determined by said row address signal and said column address signal, a pixel value stored in the memory means and for storing, at a storage location uniquely determined by said row address signal and said column address signal, a pixel value received by the memory means; and wherein said video processor further comprises timing and address generator means, which has a circuit providing a clock signal defining said predetermined pixel time intervals, for receiving said frame signals and said line signals and for generating from the clock signal, the frame signals, and the line signals: a timing signal provided to the analog to digital converter means, to the first line processor means, and to the second line processor means indicating each such predetermined pixel time interval; a ready signal provided to the first line processor means indicating that such predetermined number of pixel values are being generated by the analog to digital converter means; a ready signal provided to the second line processor means indicating that such pixel values corresponding to said input frames are being output from the first frame memory means; and a row address signal and a column address signal provided during each of said predetermined pixel time intervals to the first frame memory means and a row address signal and a column address signal provided during each of said predetermined pixel time intervals to the second frame memory means, so that during one pixel time interval: a pixel value of one input frame is generated by the analog to digital converter means; a previously generated such value corresponding to said one frame is received by the first line processor means and a first transformed pixel value corresponding to said one frame is generated thereby; a previously generated such first transformed pixel value corresponding to said one frame is stored in the first frame memory means and such a first transformed pixel value corresponding to a previous input frame previous to said one frame is output from the first frame memory means and received by the second line processor means; a second transformed pixel value corresponding to said previous input frame is generated by the second line processor means; such a second transformed pixel value previously generated by the second line processor means and corresponding to said previous input frame is stored in the second frame memory means; and such a second transformed pixel value generated by the second line processor means, corresponding to a frame previous to said previous input frame, and stored in the second frame memory means is output therefrom to the digital to analog converter and signal restoration means.

Claim 6

A video processor for performing a separable two dimensional transform on images individual to successive input video frames to generate images individual to successive output video frames, each frame having successive video signals individually corresponding to parallel video lines of a first set thereof forming the image, the processor comprising: analog to digital converter means for successively receiving said video signals of each input frame and generating from each one of said video signals a predetermined number of pixel values representing said one signal at predetermined pixel time intervals equal in number to said predetermined number of pixel values, so that the pixel values generated at corresponding pixel time intervals of each of successive such video signals represent pixels of the image along a second set of parallel lines orthogonally related to the lines of the first set; first frame memory means, having a plurality of storage locations individual to said pixel values and addressable as a two dimensional array having orthogonally related rows and columns, for storing the successive pixel values corresponding to each line of the first set thereof of alternate input frames in succession in such storage locations along said rows with said rows corresponding individually to said lines, for storing the successive pixel values corresponding to each line of the first set thereof of the other input frames in succession in such storage locations along said columns with said columns corresponding individually to the lines of the first set, for outputting pixel values corresponding to said alternate input frames in succession from such storage locations along said columns, and for outputting pixel values corresponding to said other input frames in succession from such storage locations along said rows, so that the pixel values corresponding to each frame are stored by the first frame memory means successively along and in order of the lines of the first set and are output from the first memory means successively along and in order of the lines of the second set; second frame memory means, having a plurality of storage locations individual to said pixel values and addressable as a two dimensional array having orthogonally related rows and columns, for storing the successive pixel values corresponding to each line of the second set thereof of said alternate input frames in succession in such storage locations along said columns with said columns corresponding individually to said lines of the second set thereof, for storing the successive pixel values corresponding to each line of the second set thereof of said other input frames in succession in such location along said rows with the rows corresponding individually to lines of the second set thereof, for outputting pixel values corresponding to said alternate input frames in succession from such storage locations along said rows, and for outputting pixel values corresponding to said other frames in succession from such storage locations along said columns, so that the pixel values corresponding to each frame are output by the second memory means successively along and in order of the lines of the first set; first line processor means for receiving in succession pixel values corresponding to successive pixels along individual lines of the first set thereof of each input frame and for generating, from said values corresponding to adjacent pixels in accordance with relations between said adjacent pixels predetermined by said transform along the dimension corresponding to the lines of the first set thereof, first transformed pixel values of the corresponding lines of the first set thereof of each output frame; second line processor means for receiving in succession pixel values corresponding to successive pixels along individual lines of the second set thereof of each input frame and for generating, from said values corresponding to adjacent pixels of each such line and in accordance with relations between said adjacent pixels predetermined by said transform along the dimension corresponding to the lines of the second set thereof, second transformed pixel values of the corresponding lines of the second set thereof of each output frame; and digital to analog converter and signal restoration means for receiving in succession the pixel values of each line of the first set thereof of each output frame and for generating from said values video signals corresponding to the first set of lines of the output frame, wherein, in said video processor: the first line processor means receives pixel values directly and in succession from the analog to digital converter means as said pixel values are generated thereby; the first frame memory means receives pixel values directly and in succession from the first line processor means as said pixel values are output therefrom; the second line processor means receives pixel values directly and in succession from the first frame memory means as said pixel values are output therefrom; the second frame memory means receives pixel values directly and in succession from the second line processor means as said pixel values are generated thereby; the digital to analog converter and signal restoration means receives pixel values directly and in succession from the second frame memory means as said pixel values are output therefrom; wherein the input frames are associated with individual frame signals indicating the beginning of the frames and with line signals indicating the beginning of each line of the first set thereof; wherein the first frame memory means and the second frame memory means are each responsive in each of said predetermined pixel time intervals to a row address signal and to a column address signal for outputting, from a storage location uniquely determined by said row address signal and said column address signal, a pixel value stored in the memory means and for storing, at a storage location uniquely determined by said row address signal and said column address signal, a pixel value received by the memory means; and wherein said video processor further comprises timing and address generator means, which has a circuit providing a clock signal defining said predetermined pixel time intervals, for receiving said frame signals and said line signals and for generating from the clock signal, the frame signals, and the line signals: a timing signal provided to the analog to digital converter means, to the first line processor means, and to the second line processor means indicating each such predetermined pixel time interval; a ready signal provided to the first line processor means indicating that such predetermined number of pixel values are being generated by the analog to digital converter means; a ready signal provided to the second line processor means indicating that such pixel values corresponding to said input frames are being output from the first frame memory means; and a row address signal and a column address signal provided during each of said predetermined pixel time intervals to the first frame memory means and a row address signal and a column address signal provided during each of said predetermined pixel time intervals to the second frame memory means, so that during one pixel time interval: a pixel value of one input frame is generated by the analog to digital converter means; a previously generated such value corresponding to said one frame is received by the first line processor means and a first transformed pixel value corresponding to said one frame is generated thereby; a previously generated such first transformed pixel value corresponding to said one frame is stored in the first frame memory means and such a first transformed pixel value corresponding to a previous input frame previous to said one frame is output from the first frame memory means and received by the second line processor means; a second transformed pixel value corresponding to said previous input frame is generated by the second line processor means; such a second transformed pixel value previously generated by the second line processor means and corresponding to said previous input frame is stored in the second frame memory means; and such a second transformed pixel value generated by the second line processor means, corresponding to a frame previous to said previous input frame, and stored in the second frame memory means is output therefrom to the digital to analog converter and signal restoration means.

Claim 7

The video processor of claim 3: wherein, in the first frame memory means and the second frame memory means, each of said storage locations thereof at which a pixel value is stored during one of said predetermined pixel time intervals uniquely corresponds to a storage location from which a pixel value is output during such one interval; wherein the timing and address generator means, during each such pixel time interval, generates substantially an identical column address signal for provision to both the first memory means and the second memory means so that corresponding locations therein are addressed during each one of said predetermined pixel time intervals; and wherein the timing and address generator means has: a pixel counter incremented at successive pixel time intervals in response to said timing signal; a line counter incremented at successive video line times in response to said line signals; and multiplexer means for providing, during said alternate input frames, the pixel counter as the source of the column address signal and the line counter as the source of the row address signal and for providing, during said other input frames, the pixel counter as the source of the row address signal and the line counter as the source of the column address signal.

Claim 8

The video processor of claim 3 wherein, in one of said line processor means, said pixel values received successively thereby and corresponding to successive pixels along a set of lines corresponding to said one of said line processor means are individually associated with coefficient values utilized by said one of said line processor means and wherein said one of said line processor means includes: coefficient memory means for storing said coefficient values at successively addressable locations of the coefficient memory means; means providing successive addresses to the coefficient memory means at successive such timing signals following the one of said ready signals provided to said one of said line processor means; and calculator means for receiving each of said pixel values received by said one of said line processor means, for receiving from said coefficient memory means the coefficient value corresponding to each of said pixel values, and for performing between each of said pixel values and the coefficient value corresponding thereto a calculation required by said transform and corresponding to said one of said line processor means.

Claim 9

The video processor of claim 5: wherein, during a predetermined period of time associated with the frame signal of each input frame, no video signal representing a video line forming video image is available to the analog to digital converter means; wherein the video processor is utilized with a source of said coefficient values; and wherein the video processor includes means connected to said source and to the coefficient memory means for receiving the coefficient memory means for receiving the coefficient values from said source and for providing the coefficient values to said coefficient memory means during said predetermined period of time and includes means receptive to the frame signal means for signalling said source that said predetermined period of time is occurring.