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US4658369A Expired / Lapsed US ⏱️ 0.0 years remaining

Sound synthesizing apparatus

Assignee: Sanyo Electric Co Ltd
•
Filing: 1982-06-18
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Granted: 1987-04-14
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Expires: 2002-06-18
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Abstract

Abstract Smooth transition between concatenated sound elements is achieved by use of an address control unit which is initialized to a point in time corresponding to the maximum similarity between adjacent sound units. A sound synthesizing apparatus for achieving compiling synthesization by the use of sound elements extracted from an analog sound waveform, wherein an analog sound signal is converted into a digital signal, data in the vicinity of the trailing end portion of a preceding sound element and data in the vicinity of the leading end portion of a succeeding sound element are shifted relatively and an arithmetic operation of similarity is made by arithmetic control means, and data of the succeeding sound element is clocked out from a storage means such that the succeeding sound element is connected to the preceding sound element most smoothly. Accordingly, occurrence of a harmonic noise and degradation of an S/N ratio of a synthesized sound and a intelligibility due to an abrupt change of the waveform which occurred at the junction between the preceding sound element and the succeeding sound element, i.e. the discontinuity of the waveform, are almost eliminated, whereby a synthesized sound without discontinuity of the waveform at the junction and fluctuation of a pitch frequency can be obtained.

Inventors

  • 👤 Youji Sugiura

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 07:44
CPC Classifications
G; G10; G10L; G10L13/00; G10L13/02

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 275 words
A sound synthesizing apparatus for achieving compiling synthesization by the use of sound elements extracted from an analog sound waveform, the apparatus comprising: (a) first clock means for providing a first clock signal having a first frequency; (b) second clock means for providing a second clock signal having a second frequency, (c) converting means for converting an analog input signal of said analog sound waveform into a digital signal having a plurality of bits, (d) digital storage means for storing an output of the converting means in response to said first clock signal, (e) address control means for controlling and designating an address for reading stored contents of said digital storage means, being advanced by said second clock signal; (f) arithmetic control means for sampling, in response to the first clock signal, a digital value in the vicinity of the trailing end portion of a preceding sound element obtained by converting the analog input signal and another digital value in the vicinity of the leading end portion of a succeeding sound element and thereby providing sampled trains of both of said sound elements, and for making an arithmetic operation of similarity between the sampled trains of both said sound elements while the sampled trains of both said sound elements, as sampled, are made to relatively correspond with each other, and for initializing a value of said address control means in accordance with a corresponding relation of both sampled trains at the time point where the similarity is maximum, and (g) digital/analog converting means for converting the digital signal read from said digital storage means into an analog signal and for reproducing the analog sound signal.
Claim 2
Dependent Claim 275 words
A sound synthesizing apparatus for achieving compiling synthesization by the use of sound elements extracted from an analog sound waveform, the apparatus comprising: (a) first clock means for providing a first clock signal having a first frequency; (b) second clock means for providing a second clock signal having a second frequency, (c) converting means for converting an analog input signal of said analog sound waveform into a digital signal having a plurality of bits, (d) digital storage means for storing an output of the converting means in response to said first clock signal, (e) address control means for controlling and designating an address for reading stored contents of said digital storage means, being advanced by said second clock signal; (f) arithmetic control means for sampling, in response to the first clock signal, a digital value in the vicinity of the trailing end portion of a preceding sound element obtained by converting the analog input signal and another digital value in the vicinity of the leading end portion of a succeeding sound element and thereby providing sampled trains of both of said sound elements, and for making an arithmetic operation of similarity between the sampled trains of both said sound elements while the sampled trains of both said sound elements, as sampled, are made to relatively correspond with each other, and for initializing a value of said address control means in accordance with a corresponding relation of both sampled trains at the time point where the similarity is maximum, and (g) digital/analog converting means for converting the digital signal read from said digital storage means into an analog signal and for reproducing the analog sound signal.
Claim 3
Dependent Claim 125 words
A sound synthesizing apparatus in accordance with claim 1, wherein said arithmetic control means samples, responsive to said first clock, at least one of the most significant bit or some more significant bit of the output from the converting means for converting the analog input signal into the digital signal thereby providing sampled bit trains of both of said sound elements and makes the arithmetic operation of similarity between the sampled bit trains of both said sound elements while both the sampled bit train in the vicinity of the trailing end portion of the preceding sound element and the sampled bit train in the vicinity of the leading end portion of the succeeding sound element, as sampled, are made to relatively correspond with each other.
Claim 4
Dependent Claim 106 words
A sound synthesizing apparatus in accordance with claim 1, wherein said arithmetic control means samples, responsive to said first clock, a digital value obtained by converting the input analog signal of said analog sound waveform by a separate second analog/digital converting means and makes the arithmetic operation of similarity between the sampled bit trains of both said sound elements while both the sampled bit train in the vicinity of the trailing end portion of the preceding sound element and the sampled bit train in the vicinity of the leading end portion of the succeeding sound element, as sampled, are made to relatively correspond with each other.
Claim 5
Dependent Claim 50 words
A sound synthesizing apparatus in accordance with claim 3, wherein the second analog/digital converting means is a zero crossing polarity detecting circuit which converts the polarity of the value of the analog signal in the vicinity of the zero crossing point of the input analog signal into the digital value.
Claim 6
Dependent Claim 36 words
A sound synthesizing apparatus in accordance with claim 1, 2, 3 or 4, wherein the arithmetic control means sets an initial value of said address control means by supplying clock signals to said address control means.
Claim 7
Dependent Claim 22 words
A sound synthesizing apparatus in accordance with claim 1, 2 or 3, wherein the address control means is constructed by a counter.

References Cited (Backward Citations)

US31172A Cited
US3369077A Cited
US3575555A Cited
US3588353A Cited
USRE31172E Cited
US4369336A Cited
US4464784A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1990-04-13 1990-10-13 1991-04-14 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1994-04-13 1994-10-13 1995-04-14 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1998-04-13 1998-10-13 1999-04-14 $7700.00 Window Closed / Lapsed

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