US4656428A
Expired / Lapsed
US
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Distorted waveform signal generator
Assignee: Casio Computer Co Ltd
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Filing: 1985-05-21
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Granted: 1987-04-07
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Expires: 2005-05-21
Abstract
Abstract A step signal of which the period varies according to random data is derived from a step pulse generator, and is supplied to an address counter. By the output data from the address counter, an address of a waveform ROM is specified. From a waveform ROM, the waveform based on the random data is output in the form of a distorted waveform signal. Using this output signal of the distorted waveform, a cymbal sound, for example, is generated in a musical tone generator.
Inventors
- 👤 Tomohisa Ishikawa
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 19:03
CPC Classifications
G; G10; G10H; G10H7/00; G10H7/02; G10H1/00; G10H1/36; G10H1/40; G10H1/42; G10H7/06; G10H2230/00; G10H2230/045; G10H2230/251; G10H2230/321
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
204 words
A distorted waveform signal generator, comprising: random data generating means for successively generating random data containing random values, said random data generating means including: a shift register containing a plurality of bits which includes at least a least significant bit (LSB) and a most significant bit (MSB); and an exclusive OR gate with input terminals coupled to two of said bits of said shift register, an output of the exclusive OR gate coupled to the LSB of said shift register, and certain bits of said shift register are provided as said random data; step signal generating means coupled to said shift register for generating a step signal the period of which randomly varies according to said random data; address counting means coupled to said step signal generating means and arranged to be driven stepwise by said step signal to deliver an output signal; waveform data memory means arranged to be addressed by the output signal of said address counting means to output sequentially waveform data which determines amplitude of a waveform; and waveform signal generating means coupled to said waveform data memory means for generating a waveform signal the amplitude of which randomly changes according to the waveform data output from said memory means.
Claim 2
Dependent Claim
204 words
A distorted waveform signal generator, comprising: random data generating means for successively generating random data containing random values, said random data generating means including: a shift register containing a plurality of bits which includes at least a least significant bit (LSB) and a most significant bit (MSB); and an exclusive OR gate with input terminals coupled to two of said bits of said shift register, an output of the exclusive OR gate coupled to the LSB of said shift register, and certain bits of said shift register are provided as said random data; step signal generating means coupled to said shift register for generating a step signal the period of which randomly varies according to said random data; address counting means coupled to said step signal generating means and arranged to be driven stepwise by said step signal to deliver an output signal; waveform data memory means arranged to be addressed by the output signal of said address counting means to output sequentially waveform data which determines amplitude of a waveform; and waveform signal generating means coupled to said waveform data memory means for generating a waveform signal the amplitude of which randomly changes according to the waveform data output from said memory means.
Claim 3
Dependent Claim
58 words
A distorted waveform signal generator according to claim 1, wherein said shift register contains a first bit as as the least significant bit, a second bit, a third bit, and a fourth bit as the most significant bit, and the input terminals of said exclusive OR gate are connected to the second bit and the most significant bit.
Claim 4
Dependent Claim
62 words
A distorted waveform signal generator according to claim 1, wherein said distorted waveform signal generator includes envelope data generating means for generating envelope data, and multiplying means for obtaining the product of said envelope data and said waveform data, and wherein said waveform signal generating means includes means for forming the waveform signal according to the output signal of said multiplying means.
Claim 5
Dependent Claim
211 words
A distorted waveform signal generator, comprising: random data generating means for successively generating random data containing random values, step signal generating means coupled to said random data generating means for generating a step signal the period of which randomly varies according to said random data, said step signal generating means including: first decoding means for forming a decode output by said random data; binary counting means for forming a count output in response to a clock signal of fixed period; second decoding means for forming a predetermined decode output by the count output of the binary counting means and the output of said first decoding means; and third decoding means for forming the step signal by decoding the output signal of the second decoding means; address counting means coupled to said step signal generating means and arranged to be driven stepwise by said step signal to deliver an output signal; waveform data memory means arranged to be addressed by the output signal from said address counting means to output sequentially waveform data which determines amplitude of a waveform; and waveform signal generating means coupled to said waveform data memory means for generating a waveform signal the amplitude of which randomly changes according to the waveform data output from said memory means.
Claim 6
Dependent Claim
211 words
A distorted waveform signal generator, comprising: random data generating means for successively generating random data containing random values, step signal generating means coupled to said random data generating means for generating a step signal the period of which randomly varies according to said random data, said step signal generating means including: first decoding means for forming a decode output by said random data; binary counting means for forming a count output in response to a clock signal of fixed period; second decoding means for forming a predetermined decode output by the count output of the binary counting means and the output of said first decoding means; and third decoding means for forming the step signal by decoding the output signal of the second decoding means; address counting means coupled to said step signal generating means and arranged to be driven stepwise by said step signal to deliver an output signal; waveform data memory means arranged to be addressed by the output signal from said address counting means to output sequentially waveform data which determines amplitude of a waveform; and waveform signal generating means coupled to said waveform data memory means for generating a waveform signal the amplitude of which randomly changes according to the waveform data output from said memory means.
Claim 7
Dependent Claim
63 words
A distorted waveform signal generator according to claim 4, wherein said distorted waveform signal generator further includes envelope data generating means for generating envelope data, and multiplying means for obtaining the product of said envelope data and said waveform data, and wherein said waveform signal generating means includes means for forming the waveform signal according to the output signal of said multiplying means.
Claim 8
Dependent Claim
207 words
A distorted waveform signal generator, comprising: random data generating means for successively generating random data containing random values; step signal generating means coupled to said random data generating means for generating a step signal the period of which randomly varies according to said random data; address counting means coupled to said step signal generating means and arranged to be driven stepwise by said step signal to deliver address data, said address counting means including: binary counting means coupled for reception with said step signal; a plurality of exclusive OR gates, wherein first input terminals of said exclusive OR gates are each coupled to different lower order bits of said binary counting means and second input terminals are commonly connected to a bit at a higher order than said lower order bits; and means for supplying output signals of said exclusive OR gates as said address data; waveform data memory means arranged to be addressed by the address data from said address counting means to output sequentially waveform data which determines amplitude of a waveform; and waveform signal generating means coupled to said waveform data memory means for generating a waveform signal the amplitude of which randomly changes according to the waveform data output from said memory means.
Claim 9
Dependent Claim
207 words
A distorted waveform signal generator, comprising: random data generating means for successively generating random data containing random values; step signal generating means coupled to said random data generating means for generating a step signal the period of which randomly varies according to said random data; address counting means coupled to said step signal generating means and arranged to be driven stepwise by said step signal to deliver address data, said address counting means including: binary counting means coupled for reception with said step signal; a plurality of exclusive OR gates, wherein first input terminals of said exclusive OR gates are each coupled to different lower order bits of said binary counting means and second input terminals are commonly connected to a bit at a higher order than said lower order bits; and means for supplying output signals of said exclusive OR gates as said address data; waveform data memory means arranged to be addressed by the address data from said address counting means to output sequentially waveform data which determines amplitude of a waveform; and waveform signal generating means coupled to said waveform data memory means for generating a waveform signal the amplitude of which randomly changes according to the waveform data output from said memory means.
Claim 10
Dependent Claim
31 words
A distorted waveform signal generator according to claim 6, including means for attaching to said waveform data the most significant bit (MSB) of said binary counting means as a sign bit.
Claim 11
Dependent Claim
63 words
A distorted waveform signal generator according to claim 6, wherein said distorted waveform signal generator further includes envelope data generating means for generating envelope data, and multiplying means for obtaining the product of said envelope data and said waveform data, and wherein said waveform signal generating means includes means for forming the waveform signal according to the output signal of said multiplying means.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 1990-04-06 | 1990-10-06 | 1991-04-07 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1994-04-06 | 1994-10-06 | 1995-04-07 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1998-04-06 | 1998-10-06 | 1999-04-07 | $7700.00 | Window Closed / Lapsed |