US4654635A
Expired / Lapsed
US
⏱️ 0.0 years remaining
A/D converter with integrator to enhance resolution
Assignee: US Philips Corp
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Filing: 1985-09-05
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Granted: 1987-03-31
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Expires: 2005-09-05
Abstract
Abstract By means of a controlled integrator, a noise component in the residual signal which is left after a conversion cycle of an analogue-to-digital converter can be eliminated for the major part. It is then possible to digitize this residual signal and thus to obtain additional bit information, as a result of which the range and the resolving power of the analogue-to-digital converter are increased.
Inventors
- 👤 Rudy J. VAN DE Plassche
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 09:12
CPC Classifications
H; H03; H03M; H03M1/00; H03M1/12; H03M1/14; H03M1/16; H03M1/164; H03M1/34; H03M1/38; H03M1/46
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
237 words
An analog-to-digital converter circuit comprising, a first analogue-to-digital converter comprising a comparison circuit having a first input for an analogue signal to be converted and a second input for an analogue reference signal originating from a first digital-to-analogue converter connected to an output of the comparison circuit and supplying a first digital signal, an amplifier connected to said output, a first switch which receives a control signal after a conversion cycle of the first analogue-to-digital converter and operative to pass an output signal of the amplifier to a measurement circuit comprising a second analogue-to-digital converter supplying a second supplementary digital signal thereby to increase the accuracy of the converter circuit, the measurement circuit including an integrator connected to the first switch, means connecting the second analogue-to-digital converter to an output of the integrator, the first switch being closed during a constant period of time between two of the said conversion cycles, wherein the second analogue-to-digital converter, when a given quantization level corresponding to a value which is at most equal to the value of the least significant bit of the first analogue-to-digital converter is exceeded, connects a source to the input of the integrator via a second switch thereby to reset an output signal of the integrator, and a digital adder circuit having a first input for the first digital signal, a second input for the second digital signal and an output supplying the desired digital signal.
Claim 2
Dependent Claim
237 words
An analog-to-digital converter circuit comprising, a first analogue-to-digital converter comprising a comparison circuit having a first input for an analogue signal to be converted and a second input for an analogue reference signal originating from a first digital-to-analogue converter connected to an output of the comparison circuit and supplying a first digital signal, an amplifier connected to said output, a first switch which receives a control signal after a conversion cycle of the first analogue-to-digital converter and operative to pass an output signal of the amplifier to a measurement circuit comprising a second analogue-to-digital converter supplying a second supplementary digital signal thereby to increase the accuracy of the converter circuit, the measurement circuit including an integrator connected to the first switch, means connecting the second analogue-to-digital converter to an output of the integrator, the first switch being closed during a constant period of time between two of the said conversion cycles, wherein the second analogue-to-digital converter, when a given quantization level corresponding to a value which is at most equal to the value of the least significant bit of the first analogue-to-digital converter is exceeded, connects a source to the input of the integrator via a second switch thereby to reset an output signal of the integrator, and a digital adder circuit having a first input for the first digital signal, a second input for the second digital signal and an output supplying the desired digital signal.
Claim 3
Dependent Claim
93 words
An analog-to-digital converter circuit as claimed in claim 1, wherein the second analogue-to-digital converter comprises a threshold value detector which has a threshold value equal to the said quantization level corresponding to the least significant bit of the first analogue-to-digital converter and which, when said level is exceeded by the output signal of the integrator, supplies a -1- signal as a second digital signal that keeps the second switch closed for a constant period of time, the said source supplying current, while the first digital signal is varied by one least significant bit.
Claim 4
Dependent Claim
63 words
An analog-to-digital converter circuit as claimed in claim 1, wherein the second analogue-to-digital converter comprises the parallel type, and a gate circuit connected to digital outputs of the second analogue-to-digital converter, which gate circuit determines the quantization level and supplies a signal when this level is exceeded for closing the second switch for a constant period of time, said source supplying a current.
Claim 5
Dependent Claim
29 words
An analog-to-digital converter circuit as claimed in claim 1, characterized in that the said source comprises a second digital-to-analogue converter having its inputs connected to the second digital signal.
Claim 6
Dependent Claim
26 words
An analog-to-digital converter circuit as claimed in claim 2, wherein said source comprises a second digital-to-analogue converter having its inputs connected to the second digital signal.
Claim 7
Dependent Claim
258 words
An analog/digital converter comprising: a first analog/digital converter (ADC) including a comparison circuit having a first input for an analog signal, a first digital/analog converter (DAC) having input means coupled to an output of the comparison circuit and having a first output for supplying a first digital signal and a second output coupled to a second input of the comparison circuit to supply thereto an analog reference signal, an amplifier connected to said output of the comparison circuit, an integrator, a first controlled switch for coupling an output of the amplifier to an input of the integrator, means connecting an output of the integrator to an input of a second ADC which supplies a second digital signal, means for applying a control signal to the first controlled switch after a conversion cycle of the first ADC to operate said switch to couple an output signal of the amplifier to said integrator input, said first controlled switch being closed for a constant time period between two conversion cycles, a second controlled switch, the second ADC being responsive to an output signal of the integrator representing a given quantization level corresponding to a value at most equal to the value of the least significant bit of the first ADC to supply a control signal to the second controlled switch whereby the second controlled switch connects a source to the input of the integrator thereby to reset the integrator output signal, and means for combining said first and second digital signals to derive a digital signal representative of said analog signal.
Claim 8
Dependent Claim
258 words
An analog/digital converter comprising: a first analog/digital converter (ADC) including a comparison circuit having a first input for an analog signal, a first digital/analog converter (DAC) having input means coupled to an output of the comparison circuit and having a first output for supplying a first digital signal and a second output coupled to a second input of the comparison circuit to supply thereto an analog reference signal, an amplifier connected to said output of the comparison circuit, an integrator, a first controlled switch for coupling an output of the amplifier to an input of the integrator, means connecting an output of the integrator to an input of a second ADC which supplies a second digital signal, means for applying a control signal to the first controlled switch after a conversion cycle of the first ADC to operate said switch to couple an output signal of the amplifier to said integrator input, said first controlled switch being closed for a constant time period between two conversion cycles, a second controlled switch, the second ADC being responsive to an output signal of the integrator representing a given quantization level corresponding to a value at most equal to the value of the least significant bit of the first ADC to supply a control signal to the second controlled switch whereby the second controlled switch connects a source to the input of the integrator thereby to reset the integrator output signal, and means for combining said first and second digital signals to derive a digital signal representative of said analog signal.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1990-03-30 | 1990-09-29 | 1991-03-31 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1994-03-30 | 1994-09-29 | 1995-03-31 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1998-03-30 | 1998-09-29 | 1999-03-31 | $7700.00 | Window Closed / Lapsed |