US4652858A
Expired / Lapsed
US
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Interpolative D/A converter
Assignee: Hitachi Ltd
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Filing: 1986-04-16
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Granted: 1987-03-24
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Expires: 2006-04-16
Abstract
Abstract An oversampling type digital-to-analog converter which has a light gradient overload and a high signal-to-noise ratio in spite of a comparatively low sampling frequency. In a digital-to-analog converter wherein the difference between an oversampled digital input signal and a feedback signal is taken, such differences are integrated, the integral value is quantized to obtain the feedback signal, and part of the feedback signal is used as an analog output signal; a circuit for the quantization is constructed of a circuit which converts the integral value into a digital signal smaller in the number of bits than the digital input signal, and the feedback signal is obtained by integrating the outputs of the quantization circuit by means of a digital integral circuit.
Inventors
- 👤 Masaru Kokubo
- 👤 Shigeo Nishita
- 👤 Kazuo Yamakido
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 20:31
CPC Classifications
H; H03; H03M; H03M7/00; H03M7/30; H03M7/3002; H03M7/3004; H03M7/3015; H03M7/3031; H03M3/00; H03M3/30; H03M3/50; H03M7/302; H03M7/3024; H03M7/3026
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
131 words
An interpolative digital-to-analog converter for converting a digital signal into an analog signal, comprising: a first arithmetic circuit which produces a difference between a digital input signal and a digital feedback signal having a number of bits smaller than that of a digital input signal, a second arithmetic circuit which integrates such differences, a third arithmetic circuit which produces a sum between the output of said first arithmetic circuit and that of said second arithmetic circuit, a comparator which quantizes the output of said third arithmetic circuit, a fourth arithmetic circuit which integrates an output of said comparator and generates the feedback signal, a digital-to-analog converter which converts the feedback signal into an analog signal, and a low-pass filter which removes higher harmonics components from the output of said digital-to-analog converter.
Claim 2
Dependent Claim
131 words
An interpolative digital-to-analog converter for converting a digital signal into an analog signal, comprising: a first arithmetic circuit which produces a difference between a digital input signal and a digital feedback signal having a number of bits smaller than that of a digital input signal, a second arithmetic circuit which integrates such differences, a third arithmetic circuit which produces a sum between the output of said first arithmetic circuit and that of said second arithmetic circuit, a comparator which quantizes the output of said third arithmetic circuit, a fourth arithmetic circuit which integrates an output of said comparator and generates the feedback signal, a digital-to-analog converter which converts the feedback signal into an analog signal, and a low-pass filter which removes higher harmonics components from the output of said digital-to-analog converter.
Claim 3
Dependent Claim
28 words
An interpolative digital-to-analog converter according to claim 1, wherein an absolute value of the output of said comparator is greater than the output of said third arithmetic circuit.
Claim 4
Dependent Claim
34 words
An interpolative digital-to-analog converter according to claim 2, wherein said digital-to-analog converter for converting the feedback signal into the analog signal includes means to apply an offset voltage corresponding to 1/2 least significant bit.
Claim 5
Dependent Claim
34 words
An interpolative digital-to-analog converter according to claim 3, wherein adders which constitute said first, second, third and fourth arithmetic circuits are so constructed that a single adder is used in common in time-sharing fashion.
Claim 6
Dependent Claim
34 words
An interpolative digital-to-analog converter according to claim 1, wherein said digital-to-analog converter for converting the feedback signal into the analog signal includes means to apply an offset voltage corresponding to 1/2 least significant bit.
Claim 7
Dependent Claim
34 words
An interpolative digital-to-analog converter according to claim 5, wherein adders which constitute said first, second, third and fourth arithmetic circuits are so constructed that a single adder is used in common in time-sharing fashion.
Claim 8
Dependent Claim
34 words
An interpolative digital-to-analog converter according to claim 1, wherein adders which constitute said first, second, third and fourth arithmetic circuits are so constructed that a single adder is used in common in time-sharing fashion.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1990-03-23 | 1990-09-22 | 1991-03-24 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1994-03-23 | 1994-09-22 | 1995-03-24 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1998-03-23 | 1998-09-22 | 1999-03-24 | $7700.00 | Window Closed / Lapsed |