US4651213A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Clamping apparatus for a video signal
Assignee: NEC Corp
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Filing: 1984-11-27
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Granted: 1987-03-17
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Expires: 2004-11-27
Abstract
Abstract A feedback clamping circuit for producing a drift error free digital signal from an input analog video signal. The circuit includes a differential amplifier which receives the input analog signal and an error signal. At its output, the differential amplifier delivers a drift free analog video output. To produce the error signal, the output of the differential amplifier is digitized and supplied to a switching circuit. A reference signal is also supplied to the switching circuit. Alternatively, the switching circuit supplies the two signals it receives to a D/A and from there to first and second sample and hold circuits. A comparator compares the level of the two signals that are supplied by the switching circuit and produces the error signal from them. The video signal is sampled during its pedestal phase and the reference signal shortly thereafter. The difference amplifier adjusts its output to minimize the level of the error signal.
Inventors
- 👤 Hideki Takimoto
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 10:47
CPC Classifications
H; H04; H04N; H04N5/00; H04N5/14; H04N5/16; H04N5/18; H04N5/185
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
254 words
A clamping circuit for a video signal comprising: (A) a differential amplifier for receiving an input analog video signal through one input terminal thereof and for producing an analog signal at an output terminal thereof; (B) means for converting said analog signal at said output terminal of said differential amplifier into a digital video signal; (C) comparator means for producing a difference signal representative of the difference between a pedestal level in said digital video signal and a predetermined reference level said comparator means comprising: (1) a separator circuit for separating a synchronizing signal from said input analog video signal; (2) a sampling pulse generator responsive to said synchronizing signal for generating a sample pulse during the occurrence of said pedestal level; (3) a switching circuit for alternatively delivering said digital video signal or said predetermined reference level in response to said sample pulse; (4) a digital-to-analog converter for converting the output of said switching circuit into an analog signal; (5) first means for sampling and holding said analog signal delivered from said digital-to-analog converter in response to said sample pulse; (6) second means for sampling and holding said analog signal delivered from said digital-to-analog converter at a time other than during the occurrence of said sample pulse; and (7) a comparator for comparing the outputs delivered from said first and second holding means and for producing said difference signal in response thereto; and (D) means for feeding back said difference signal to another input of said differential amplifier to minimize said difference signal.
Claim 2
Dependent Claim
254 words
A clamping circuit for a video signal comprising: (A) a differential amplifier for receiving an input analog video signal through one input terminal thereof and for producing an analog signal at an output terminal thereof; (B) means for converting said analog signal at said output terminal of said differential amplifier into a digital video signal; (C) comparator means for producing a difference signal representative of the difference between a pedestal level in said digital video signal and a predetermined reference level said comparator means comprising: (1) a separator circuit for separating a synchronizing signal from said input analog video signal; (2) a sampling pulse generator responsive to said synchronizing signal for generating a sample pulse during the occurrence of said pedestal level; (3) a switching circuit for alternatively delivering said digital video signal or said predetermined reference level in response to said sample pulse; (4) a digital-to-analog converter for converting the output of said switching circuit into an analog signal; (5) first means for sampling and holding said analog signal delivered from said digital-to-analog converter in response to said sample pulse; (6) second means for sampling and holding said analog signal delivered from said digital-to-analog converter at a time other than during the occurrence of said sample pulse; and (7) a comparator for comparing the outputs delivered from said first and second holding means and for producing said difference signal in response thereto; and (D) means for feeding back said difference signal to another input of said differential amplifier to minimize said difference signal.
Claim 3
Dependent Claim
250 words
A circuit for reducing errors associated with the conversion of an input video signal to a digital signal representative thereof, said circuit comprising: (A) means responsive to said input video signal for producing a sample pulse when said input video signal is in its pedestal level; (B) comparator means for comparing the value of said digital signal during the occurrence of said sample pulse to a reference level and for producing a difference signal representative of said comparison; (C) a difference amplifier having a first input coupled to said input video signal, a second input which receives said difference signal and an output; and (D) an analog-to-digital converter coupled to said output of said differential amplifier for producing said digital signal, the output of said differential amplifier being adjusted to minimize said difference signal, said comparator means including: (1) a switching circuit for alternatively delivering said digital video signal or a reference data corresponding to said reference level in response to said sample pulse; (2) a digital-to-analog converter for converting the output of said switching circuit into an analog signal; (3) first means for sampling and holding said analog signal delivered from said digital-to-analog converter in response to said sample pulse; (4) second means for sampling and holding said analog signal delivered from said digital-to-analog converter at a time other than during the occurrence of said sample pulse; and (5) a comparator for comparing the outputs delivered from said first and second holding means and for producing said difference signal.
Claim 4
Dependent Claim
250 words
A circuit for reducing errors associated with the conversion of an input video signal to a digital signal representative thereof, said circuit comprising: (A) means responsive to said input video signal for producing a sample pulse when said input video signal is in its pedestal level; (B) comparator means for comparing the value of said digital signal during the occurrence of said sample pulse to a reference level and for producing a difference signal representative of said comparison; (C) a difference amplifier having a first input coupled to said input video signal, a second input which receives said difference signal and an output; and (D) an analog-to-digital converter coupled to said output of said differential amplifier for producing said digital signal, the output of said differential amplifier being adjusted to minimize said difference signal, said comparator means including: (1) a switching circuit for alternatively delivering said digital video signal or a reference data corresponding to said reference level in response to said sample pulse; (2) a digital-to-analog converter for converting the output of said switching circuit into an analog signal; (3) first means for sampling and holding said analog signal delivered from said digital-to-analog converter in response to said sample pulse; (4) second means for sampling and holding said analog signal delivered from said digital-to-analog converter at a time other than during the occurrence of said sample pulse; and (5) a comparator for comparing the outputs delivered from said first and second holding means and for producing said difference signal.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1990-03-16 | 1990-09-15 | 1991-03-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1994-03-16 | 1994-09-15 | 1995-03-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1998-03-16 | 1998-09-15 | 1999-03-17 | $7700.00 | Window Closed / Lapsed |