US4649520A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Single layer polycrystalline floating gate
Assignee: STMicroelectronics lnc USA
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Filing: 1984-11-07
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Granted: 1987-03-10
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Expires: 2004-11-07
Abstract
Abstract A programmable read only memory includes a transistor having an N type source, an N type drain, and a polysilicon floating gate extending over the channel between the source and drain. The floating gate also extends over and is capacitively coupled to an N well. By applying an electric potential to the N well, the potential on the floating gate above the channel is altered. Within the N well is a P region, which mitigates the decrease in capacitive coupling between the N well and the floating gate caused by carrier depletion.
Inventors
- 👤 Boaz Eitan
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 08:39
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/68; H10D30/681; H10D30/684; H10D30/685
Claims Analysis
Total Claims: 16
Claim 1
Independent Claim
174 words
A programmable read only memory comprising a substrate of a first conductivity type; a source region of a second conductivity type opposite to said first conductivity type formed in said substrate; a drain region of said second conductivity type formed in said substrate and separated from said source region by a first intermediate region of said substrate; a third region of said second conductivity type formed in said substrate and separated from said source region and said drain region by a second intermediate region of said substrate; insulation formed over said source region, said drain region, said third region, and said first and second intermediate regions; conductive means for causing a conductive path to form between said source region and said drain region, said conductive means formed on said insulation and extending over said third region, said second intermediate region and said first intermediate region; and means for applying a first electrical potential to said source region, a second electrical potential to said drain region and a third electrical potential to said third region.
Claim 2
Dependent Claim
174 words
A programmable read only memory comprising a substrate of a first conductivity type; a source region of a second conductivity type opposite to said first conductivity type formed in said substrate; a drain region of said second conductivity type formed in said substrate and separated from said source region by a first intermediate region of said substrate; a third region of said second conductivity type formed in said substrate and separated from said source region and said drain region by a second intermediate region of said substrate; insulation formed over said source region, said drain region, said third region, and said first and second intermediate regions; conductive means for causing a conductive path to form between said source region and said drain region, said conductive means formed on said insulation and extending over said third region, said second intermediate region and said first intermediate region; and means for applying a first electrical potential to said source region, a second electrical potential to said drain region and a third electrical potential to said third region.
Claim 3
Dependent Claim
26 words
A programmable read only memory as in claim 1 wherein said first intermediate region comprises a channel region between said source region and said drain region.
Claim 4
Dependent Claim
102 words
A programmable read only memory as in claim 1 wherein said means for applying a first electrical potential to said source region, a second electrical potential to said drain region and a third electrical potential to said third region comprises a first via formed through said insulation to said source region, a second via formed through said insulation to said drain region and a third via formed through said insulation to said third region, each of said first, second and third vias containing an electrically conductive material formed in ohmic contact with the underlying source region, drain region and third region respectively.
Claim 5
Dependent Claim
84 words
A programmable read only memory as in claim 3 including: means for applying a first electrical potential to said contact material in said first via; means for applying a second electrical potential to said contact material in said second via; and means for applying a third electrical potential to said contact material in said third via thereby to generate a potential on said conductive material, said potential thereby controlling the conductivity of the first intermediate region between said source region and said drain region.
Claim 6
Dependent Claim
46 words
A programmable read only memory as in claim 4 wherein said third region comprises a well region for receiving an electrical potential thereby to control the electrical potential on said conductive means formed over said first intermediate region, said second intermediate region and said third regions.
Claim 7
Dependent Claim
37 words
A programmable read only memory as in claim 1 wherein said conductive means completely covers the first intermediate region between said source region and said drain region thereby to control the conductivity of said first intermediate region.
Claim 8
Dependent Claim
43 words
A programmable read only memory as in claim 6 including opaque means formed over said first intermediate region, said second intermediate region, said source region, said drain second region and a portion of said third region to prevent light from striking said regions.
Claim 9
Dependent Claim
25 words
A programmable read only memory as in claim 1 wherein said first conductivity type is P type and said second conductivity type is N type.
Claim 10
Dependent Claim
33 words
A programmable read only memory as in claim 1 further comprising a fourth region of said first conductivity type located adjacent to said third region, said fourth region extending underneath said conductive means.
Claim 11
Dependent Claim
20 words
A programmable read only memory as in claim 1 further comprising means for coupling said source region to said substrate.
Claim 12
Dependent Claim
124 words
A programmable read only memory comprising: an MOS transistor having a source region, a drain region and a channel region therebetween, all formed in a semiconductor substrate, and a floating gate formed over, but insulated from the channel region, means for applying selected potentials to said source region and said drain region, a well region formed in said substrate laterally spaced from said source region, said drain region and said channel region; a portion of said floating gate formed to extend on insulation over a portion of said well region; and means for applying a potential to said well region thereby to change the charge stored on said floating gate and thereby to allow the threshold voltage of said MOS transistor to be changed.
Claim 13
Dependent Claim
124 words
A programmable read only memory comprising: an MOS transistor having a source region, a drain region and a channel region therebetween, all formed in a semiconductor substrate, and a floating gate formed over, but insulated from the channel region, means for applying selected potentials to said source region and said drain region, a well region formed in said substrate laterally spaced from said source region, said drain region and said channel region; a portion of said floating gate formed to extend on insulation over a portion of said well region; and means for applying a potential to said well region thereby to change the charge stored on said floating gate and thereby to allow the threshold voltage of said MOS transistor to be changed.
Claim 14
Dependent Claim
12 words
Structure as in claim 11 wherein said well region is lightly doped.
Claim 15
Dependent Claim
24 words
Structure as in claim 12 wherein said well region is doped to a concentration of 8×10 15 to 1×20 17 atoms per cubic centimeter.
Claim 16
Dependent Claim
43 words
Structure as in claim 11 including an opaque material formed over said MOS transistor, said well region and said floating gate, said opaque material coming into contact with said substrate, thereby to prevent light from changing the charge stored on said floating gate.
References Cited (Backward Citations)
US4599706A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1990-03-09 | 1990-09-08 | 1991-03-10 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1994-03-09 | 1994-09-08 | 1995-03-10 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1998-03-09 | 1998-09-08 | 1999-03-10 | $7700.00 | Window Closed / Lapsed |