← Back to Patent Explorer
US4647841A Expired / Lapsed US ⏱️ 0.0 years remaining

Low voltage, high precision current source

Assignee: Motorola Solutions Inc
•
Filing: 1985-10-21
•
Granted: 1987-03-03
•
Expires: 2005-10-21
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A precision current mirror circuit includes first and second transistors the bases of which are coupled together and whose emitters are coupled to ground. The collector of the first transistor is connected to a reference current source for sinking a reference current therefrom while the collector of the second transistor is connected to an output of the current error for sinking a current at the output that substantially mirrors the reference current. A differential amplifier is provided having its non-inverting and inverting inputs coupled to the collectors of the first and second transistors respectively and its output connected to the bases of the two transistors such that the voltage that is established at the output of the current mirror is forced onto the collector of the first transistor. With the two transistors being matched the respective collector-base voltages therefore track which eliminates "Early" voltage errors as well as affects of the lower output impedances of the two transistors.

Inventors

  • 👤 Ira Miller

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-31 09:55
CPC Classifications
G; G05; G05F; G05F3/00; G05F3/02; G05F3/08; G05F3/10; G05F3/16; G05F3/20; G05F3/26; G05F3/267

Claims Analysis

Total Claims: 3
Claim 1
Independent Claim 218 words
A combined bipolar, MOS-integrated current source comprising: a first current source for supplying a reference current; a first bipolar transistor having an emitter, base and collector, said collector being coupled to said first current source, said emitter being coupled to a ground supply terminal; a second current source providing a predetermined current at an output thereof; first and second MOS transistors each having a drain, source and gate, said drains being interconnected to said output of said second current source, said gate of said first MOS transistor being coupled at said collector of said first bipolar transistor, said source of said first transistor being coupled to said ground supply terminal; a second bipolar transistor the base of which is connected both to said base of said first bipolar transistor and said source of said second MOS transistor, the collector and emitter of said second bipolar transistor being coupled to said base thereof and said ground supply terminal respectively; a bias supply for providing a bias potential to said gate of said second MOS transistor; and a third bipolar transistor the base of which is coupled to said base of said second bipolar transistor. the emitter being coupled to said ground supply terminal and the collector being coupled to an output of the current source to provide current thereat.
Claim 2
Dependent Claim 218 words
A combined bipolar, MOS-integrated current source comprising: a first current source for supplying a reference current; a first bipolar transistor having an emitter, base and collector, said collector being coupled to said first current source, said emitter being coupled to a ground supply terminal; a second current source providing a predetermined current at an output thereof; first and second MOS transistors each having a drain, source and gate, said drains being interconnected to said output of said second current source, said gate of said first MOS transistor being coupled at said collector of said first bipolar transistor, said source of said first transistor being coupled to said ground supply terminal; a second bipolar transistor the base of which is connected both to said base of said first bipolar transistor and said source of said second MOS transistor, the collector and emitter of said second bipolar transistor being coupled to said base thereof and said ground supply terminal respectively; a bias supply for providing a bias potential to said gate of said second MOS transistor; and a third bipolar transistor the base of which is coupled to said base of said second bipolar transistor. the emitter being coupled to said ground supply terminal and the collector being coupled to an output of the current source to provide current thereat.
Claim 3
Dependent Claim 40 words
The current source of claim 1 including a fourth bipolar transistor having the base-emitter path thereof coupled in parallel with the base-emitter path of said third bipolar transistor and a collector coupled to a second output of the current source.

References Cited (Backward Citations)

US3914683A Cited
US4471236A Cited
DE3419664A1 Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1990-03-02 1990-09-01 1991-03-03 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1994-03-02 1994-09-01 1995-03-03 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1998-03-02 1998-09-01 1999-03-03 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag