US4646251A
Expired / Lapsed
US
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Computer graphics, parametric patch parallel subdivision processor
Assignee: PTC Inc
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Filing: 1985-10-03
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Granted: 1987-02-24
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Expires: 2005-10-03
Abstract
Abstract A system is disclosed for subdividing parametric patches for use in a computer graphics system to develop images. The system utilizes initial data, provided as by an interactive user, to represent control points for an initial patch from which the system rapidly computes control points for subpatches using parallel processors. The disclosed system is recursive so that each level of subdivision leads to greater refinement of an initial patch. In one embodiment, the processors in the system compute multiple control points, the grouping of processors exploiting patch symmetrical properties.
Inventors
- 👤 Alan B. Hayes
- 👤 Russell A. Brown
- 👤 Thomas W. Jensen
- 👤 Bruce K. Madsen
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 20:18
CPC Classifications
G; G06; G06T; G06T17/00; G06T17/20
Claims Analysis
Total Claims: 20
Claim 1
Independent Claim
102 words
A system for subdividing parametric patches defined by initial control points to attain control points for subpatches in accordance with established subdivision equations, comprising: means for supplying signals representative of said initial control points for a patch to be subdivided; a plurality of processors for executing said subdivision equations connected to receive said signals representative of said initial control points for a patch to be subdivided; means for controlling said processors to selectively process said signals representative of said initial control points to provide resultant signals representative of control points for subpatches; and means for receiving said resultant signals from said processors.
Claim 2
Independent Claim
102 words
A system for subdividing parametric patches defined by initial control points to attain control points for subpatches in accordance with established subdivision equations, comprising: means for supplying signals representative of said initial control points for a patch to be subdivided; a plurality of processors for executing said subdivision equations connected to receive said signals representative of said initial control points for a patch to be subdivided; means for controlling said processors to selectively process said signals representative of said initial control points to provide resultant signals representative of control points for subpatches; and means for receiving said resultant signals from said processors.
Claim 3
Dependent Claim
33 words
A system according to claim 1 wherein said means for supplying signals comprises bus means for supplying said signals representative of said initial control points in sequence for selective use by said processors.
Claim 4
Dependent Claim
24 words
A system according to claim 2 wherein said means for receiving said resultant signals comprises a means for passing said resultant signals in sequence.
Claim 5
Dependent Claim
25 words
A system according to claim 1 wherein said plurality of processors comprises a processor for each of said control points for subpatches to be generated.
Claim 6
Dependent Claim
42 words
A system according to claim 1 wherein said plurality of processors comprise less than one processor for each of said control points for subpatches and wherein certain of said processors include structure for computing a plurality of said control points for subpatches.
Claim 7
Dependent Claim
27 words
A system according to claim 1 wherein said plurality of processors each comprise substantially similar structures each for generating a plurality of said control points for subpatches.
Claim 8
Dependent Claim
48 words
A system according to claim 1 wherein said means for supplying signals representative of said initial control points includes means for providing signals representative of a name for said initial control points and means for providing signals representative of the value of data for said initial control points.
Claim 9
Dependent Claim
23 words
A system according to claim 1 wherein said processors include logic means for selectively accepting said signals representative of said initial control points.
Claim 10
Dependent Claim
13 words
A system according to claim 8 wherein said logic means includes a counter.
Claim 11
Dependent Claim
52 words
A system according to claim 1 wherein said means for supplying signals comprises bus means for supplying said signals representative of said initial control points in sequence for selective use by said processors and wherein said means for receiving said resultant signals comprises a means for passing said resultant signals in sequence.
Claim 12
Dependent Claim
40 words
A system according to claim 10 wherein said plurality of processors comprises less than one processor for each of said control points and wherein certain of said processors include structure for computing a plurality of said control points for subpatches.
Claim 13
Dependent Claim
14 words
A system according to claim 10 further including control means to subdivide space curves.
Claim 14
Dependent Claim
51 words
A system according to claim 1 wherein said means for receiving resultant signals representative of control points for subpatches includes means for providing signals representative of a name for said control points for subpatches and means for receiving signals representative of the value of data for said control points for subpatches.
Claim 15
Dependent Claim
24 words
A system according to claim 1 wherein said processors include logic means for selectively transmitting said signals representative of said control points for subpatches.
Claim 16
Dependent Claim
13 words
A system according to claim 14 wherein said logic means includes a counter.
Claim 17
Dependent Claim
14 words
A system according to claim 1 wherein said means for controlling includes a RAM.
Claim 18
Dependent Claim
14 words
A system according to claim 1 wherein said means for controlling includes a PLA.
Claim 19
Dependent Claim
20 words
A system according to claim 1 wherein said processors comprise multiple groups of processors and said groups are substantially identical.
Claim 20
Dependent Claim
46 words
A system according to claim 1 wherein processors comprise a single group of processors and wherein said means for supplying signals comprises means for repeatedly supplying said initial control points whereby upon each such supplying, said processors compute a different set of control points for subpatches.
References Cited (Backward Citations)
US3889107A
Cited
US4360884A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1990-02-23 | 1990-08-25 | 1991-02-24 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1994-02-23 | 1994-08-25 | 1995-02-24 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1998-02-23 | 1998-08-25 | 1999-02-24 | $7700.00 | Window Closed / Lapsed |