US4646231A
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Method of synchronizing the sequence by which a variety of randomly called unrelated activities are executed in a digital processor
Assignee: Unisys Corp
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Filing: 1983-07-21
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Granted: 1987-02-24
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Expires: 2003-07-21
Abstract
Abstract A method of synchronizing the sequence by which a variety of unrelated activities are executed in a digital processor when the activities are randomly called by multiple callers includes the steps of: providing a single processor queue for holding respective pointers to each different kind of activity that the processor performs; entering the pointer of an activity in the processor queue the first time that the activity is called; providing respective activity queues for each different kind of activity that the processor performs; entering a pointer to the caller of an activity in the respective queue for the called activity each time the activity is called subsequent to its first call; repeatedly executing a single activity pointed to by one pointer in the processor queue until that activity is executed once for each of its callers, provided that if the single activity calls another activity then, executing the single activity only up to the point where the call occurs; and proceeding in the same fashion with the execution of another activity pointed to by the processor queue.
Inventors
- 👤 Howard H. Green
- 👤 Christopher J. Tomlinson
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 00:19
CPC Classifications
G; G06; G06F; G06F9/00; G06F9/06; G06F9/46; G06F9/48; G06F9/4806; G06F9/4843; G06F9/4881
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
215 words
A method of synchronizing the sequence by which a variety of unrelated activities are executed in a plurality of digital processors when said activities in each processor randomly call the activities in the other processors, including the steps of: providing with each processor, an individual processor queue for holding respective pointers to each different kind of activity that the processor performs; entering into the processor queue of a processor whose activity is called, the pointer of the called activity the first time that activity is called; providing, with each processor, respective activity queues for each different kind of activity that the processor performs; entering a pointer to the caller of an activity in the respective queue for the called activity each time the activity is called subsequent to its first call; repeatedly executing, in each processor, a single activity as pointed to by one pointer in the processor's processor queue until the activity is executed once for each of its callers as pointed to by its activity queue, provided that if said single activity calls another activity then, executing said single activity only up to the point where the call occurs; and proceeding in the same fashion, in each processor, with the execution of all other activities as pointed to by the processor's processor queue.
Claim 2
Independent Claim
215 words
A method of synchronizing the sequence by which a variety of unrelated activities are executed in a plurality of digital processors when said activities in each processor randomly call the activities in the other processors, including the steps of: providing with each processor, an individual processor queue for holding respective pointers to each different kind of activity that the processor performs; entering into the processor queue of a processor whose activity is called, the pointer of the called activity the first time that activity is called; providing, with each processor, respective activity queues for each different kind of activity that the processor performs; entering a pointer to the caller of an activity in the respective queue for the called activity each time the activity is called subsequent to its first call; repeatedly executing, in each processor, a single activity as pointed to by one pointer in the processor's processor queue until the activity is executed once for each of its callers as pointed to by its activity queue, provided that if said single activity calls another activity then, executing said single activity only up to the point where the call occurs; and proceeding in the same fashion, in each processor, with the execution of all other activities as pointed to by the processor's processor queue.
Claim 3
Dependent Claim
36 words
A method according to claim 1 and further including the step of removing from said activity queue, the pointer to a calling activity when the activity which it called is executed for that particular calling activity.
Claim 4
Dependent Claim
37 words
A method according to claim 2 and further including the step of limiting access to all of said queues such that said pointers can be entered therein and removed therefrom by only one processor at a time.
Claim 5
Dependent Claim
32 words
A method according to claim 3 and further including the step of storing said individual processor queue for each processor and respective activity queues for each processor as records in a memory.
Claim 6
Dependent Claim
27 words
A method according to claim 3 and further including the step of coupling all of said queues to said processors and callers via a single time-shared bus.
Claim 7
Dependent Claim
40 words
A method according to claim 3 and further including the step of storing the various activities that said processors perform in a memory which is coupled to and addressable by said processor but not by said callers of said activities.
Claim 8
Dependent Claim
172 words
A data processing system, including: a plurality of digital processors; each processor being coupled to a memory containing a variety of callable activities that the processor performs; each processor having its own processor queue; respective pointers in each processor queue pointing to each different kind of activity that has been called for that processor to perform; each processor further having respective activity queues for each kind of activity that the processor performs; each activity queue containing pointers to the callers of that particular activity; means for directing each processor to repeatedly execute a single activity as pointed to by one pointer in that processor's processor queue until said single activity is executed once for each caller in the corresponding activity queue, provided that if said single activity calls another activity then to execute said single activity only up to the point where the call occurs; and means for directing each processor to proceed in the same fashion with the execution of all other activities as pointed to by that processor's processor queue.
Claim 9
Dependent Claim
172 words
A data processing system, including: a plurality of digital processors; each processor being coupled to a memory containing a variety of callable activities that the processor performs; each processor having its own processor queue; respective pointers in each processor queue pointing to each different kind of activity that has been called for that processor to perform; each processor further having respective activity queues for each kind of activity that the processor performs; each activity queue containing pointers to the callers of that particular activity; means for directing each processor to repeatedly execute a single activity as pointed to by one pointer in that processor's processor queue until said single activity is executed once for each caller in the corresponding activity queue, provided that if said single activity calls another activity then to execute said single activity only up to the point where the call occurs; and means for directing each processor to proceed in the same fashion with the execution of all other activities as pointed to by that processor's processor queue.
Claim 10
Dependent Claim
58 words
A system according to claim 7 wherein said means for directing includes a controller means that is responsive to an instruction from any processor that calls an activity or completes the execution of a called activity to interrogate said pointers in said queues and to inform the processor which sends said instruction of the activity to perform next.
Claim 11
Dependent Claim
27 words
A system according to claim 7 wherein the processor queue for each processor and respective activity queues for each processor are comprised of records in a memory.
Claim 12
Dependent Claim
29 words
A system according to claim 7 and further including means for limiting access to said queues such that said pointers are entered by only one caller at a time.
Claim 13
Dependent Claim
22 words
A system according to claim 7 and further including a single time-shared bus coupling said queues to said processor and multiple callers.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1990-02-23 | 1990-08-25 | 1991-02-24 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1994-02-23 | 1994-08-25 | 1995-02-24 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1998-02-23 | 1998-08-25 | 1999-02-24 | $7700.00 | Window Closed / Lapsed |