Addresser designation character pattern generation apparatus for facsimile transmission

Claim 2

A video pattern generation apparatus comprising: a read-only memory means for storing a plurality of characters which are decomposed on a bit-by-bit basis in the horizontal and vertical directions; and microprocessor means for sequentially reading the character bits out of the memory means and expanding the characters to a predetermined extent for transmission.

Claim 3

A video pattern generation apparatus comprising: a read-only memory means for storing a plurality of characters which are decomposed on a bit-by-bit basis in the horizontal and vertical directions; and microprocessor means for sequentially reading the character bits out of said read-only memory means and expanding the characters to a predetermined extent for transmission; the character bits being divided into n blocks each consisting of a predetermined number of bits which are stored in said read-only memory means in an alternating arrangement whereby bits in respective positions in the blocks follow each other in consecutive order, the microprocessor means being constructed to compute the logical OR function of said predetermined number of respective character bits of each block and data bits produced by shifting respective character bits by one bit position n-1 times for producing horizontal character lines enlarged by n.

Claim 4

A video pattern generation apparatus comprising: a read-only memory means for storing a plurality of characters which are decomposed on a bit-by-bit basis in the horizontal and vertical directions; and microprocessor means for sequentially reading the character bits out of said read-only memory means and expanding the characters to a predetermined extent for transmission; the character bits being divided into n blocks each consisting of a predetermined number of bits which are stored in said read-only memory means in an alternating arrangement whereby bits in respective positions in the blocks follow each other in consecutive order, the microprocessor means being constructed to compute the logical OR function of said predetermined number of respective character bits of each block and data bits produced by shifting respective character bits by one bit position n-1 times for producing horizontal character lines enlarged by n.

Claim 5

A video pattern generation apparatus comprising: memory means for storing data bits corresponding to scan lines of characters; computing means for reading the data bits out of the memory means; and transmission means for transmitting each consecutive data bit a predetermined number of times; the data bits of each scan line being divided into a number of groups which are stored in the memory means in an alternating manner, said number being equal to said predetermined number, the computing means comprising register means and operation means for separating the groups of data bits by means of logical product operations, generating duplicate data bits by means of logical sum and shifting operations and storing the data bits and duplicate data bits in the register means in consecutive order such that said predetermined number of each data bit is followed by said predetermined number of the next consecutive data bit.

Claim 6

A video pattern generation apparatus comprising: memory means for storing data bits corresponding to scan lines of characters; computing means for reading the data bits out of the memory means; and transmission means for transmitting each consecutive data bit a predetermined number of times; the data bits of each scan line being divided into a number of groups which are stored in the memory means in an alternating manner, said number being equal to said predetermined number, the computing means comprising register means and operation means for separating the groups of data bits by means of logical product operations, generating duplicate data bits by means of logical sum and shifting operations and storing the data bits and duplicate data bits in the register means in consecutive order such that said predetermined number of each data bit is followed by said predetermined number of the next consecutive data bit.

Claim 7

A video pattern generation apparatus comprising: memory means for storing data bits corresponding to scan lines of characters; computing means for reading the data bits out of the memory means; and transmission means for transmitting each consecutive data bit a predetermined number of times; the memory means comprising first storage means for storing the data bits, second storage means for storing character codes, column counter means for counting horizontal scan clock pulses, the computing means reading data bits from the first storage means in response to carry pulses from the column counter means and third storage means for storing the data bits read by the computing means, the transmission means transmitting the data bits in synchronism with the horizontal scan clock pulses.

Claim 8

A video pattern generation apparatus comprising: memory means for storing data bits corresponding to scan lines of characters; computing means for reading the data bits out of the memory means; and transmission means for transmitting each consecutive data bit a predetermined number of times; the memory means comprising first storage means for storing the data bits, second storage means for storing character codes, column counter means for counting horizontal scan clock pulses, the computing means reading data bits from the first storage means in response to carry pulses from the column counter means and third storage means for storing the data bits read by the computing means, the transmission means transmitting the data bits in synchronism with the horizontal scan clock pulses.

Claim 9

An apparatus as in claim 4, in which the third storage means comprises first latch means for latching data bits read by the computing means and second latch means for latching data bits from the first latch means in response to the carry pulses.