US4639896A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Redundant row decoding for programmable devices
Assignee: Intersil Corp
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Filing: 1984-11-30
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Granted: 1987-01-27
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Expires: 2004-11-30
Abstract
Abstract A redundant row scheme having a protection circuit between the programmable decoder and the line driver of a redundant row system which provides a path to ground for discharging the row line and limits the voltage across the programmable decoder to prevent grow-back of the programmed fuses.
Inventors
- 👤 Michael J. Brannigan
- 👤 David L. Rutledge
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 14:36
CPC Classifications
G; G11; G11C; G11C29/00; G11C29/70; G11C29/78; G11C29/785; G11C8/00; G11C8/08
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
60 words
In a memory array having at least one redundant row, programmable decoder for said redundant row, and a row driver connected between said programmable decoder and said redundant row, the improvement comprising: protection means connected between said programmable decoder and said row driver for isolating said decoder from said row driver and for limiting the voltage across said programmable decoder.
Claim 2
Dependent Claim
60 words
In a memory array having at least one redundant row, programmable decoder for said redundant row, and a row driver connected between said programmable decoder and said redundant row, the improvement comprising: protection means connected between said programmable decoder and said row driver for isolating said decoder from said row driver and for limiting the voltage across said programmable decoder.
Claim 3
Dependent Claim
30 words
A memory according to claim 1 wherein said protection means includes first switch means for discharging said row to a common potential through said driver when said row is deselected.
Claim 4
Dependent Claim
28 words
A memory according to claim 2 wherein said protection means includes clamping means for limiting the voltage across said programmable decoder to prevent grow-back of a programmable fuse.
Claim 5
Dependent Claim
81 words
In a memory array having at least one redundant row, programmable decoder for said redundant row, and a row driver connected between said programmable decoder and said redundant row, the improvement comprising: first switch means connected between said programmable decoder and said row driver for discharging said row to a common potential through said driver when said row is deselected; and clamping means connected between said programmable decoder and said first switching means for limiting the voltage across said programmable decoder.
Claim 6
Dependent Claim
81 words
In a memory array having at least one redundant row, programmable decoder for said redundant row, and a row driver connected between said programmable decoder and said redundant row, the improvement comprising: first switch means connected between said programmable decoder and said row driver for discharging said row to a common potential through said driver when said row is deselected; and clamping means connected between said programmable decoder and said first switching means for limiting the voltage across said programmable decoder.
Claim 7
Dependent Claim
33 words
A memory according to claim 4 wherein said programmable decoder includes a plurality of metal fuses and said clamping means limits said voltage across said fuses to prevent grow-back of a programmed fuse.
Claim 8
Dependent Claim
46 words
A memory according to claim 4 wherein said first switch includes a transistor having its emitter-collector connected between said row driver and said common potential and a base, and an inverter connected between said programming decoder and said base for turning said transistor on and off.
Claim 9
Dependent Claim
38 words
A memory according to claim 4 wherein said clamping means includes a pair of diodes connected between said programmable decoder and the base of a transistor and the emitter of said transistor being connected to said common potential.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1990-01-26 | 1990-07-28 | 1991-01-27 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1994-01-26 | 1994-07-28 | 1995-01-27 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1998-01-26 | 1998-07-28 | 1999-01-27 | $7700.00 | Window Closed / Lapsed |