Individual cylinder ignition control

Claim 2

An ignition system for providing individual cylinder spark control for multicylinder engines including a shaft encoder directly connected to the engine crankshaft, said encoder producing a large number of encoder pulses per engine revolution (NC), means connected to said shaft encoder producing a single timing reference pulse every other shaft revolution at the same reference shaft position, a first counter connected to receive said timing reference pulses and said encoder pulses (NC) and to produce a carry pulse after every N counts where N is equal to 2NC/number of cylinders of said engine and N counts thus represents the theoretical crank angle between successive cylinder reference shaft positions, second and third counters connected to receive each carry pulse, said second counter delaying said carry pulse by a fixed number of encoder output pulses to produce a maximum timing advance, said third counter being incremented one step for each carry pulse and being also connected to be reset by each timing reference pulse to synchronize said third counter with engine rotation, memory means having a plurality of memory locations containing code information representing actual measured individual offset crankshaft angles for each individual cylinder of the engine being controlled, a variable delay counter and means connecting said second counter to said memory means and to said variable delay counter to cause said memory means to unload a code number to said variable delay counter corresponding to the cylinder indicated by said third counter, each said code number being delayed by said maximum timing advance, said variable delay counter thereby producing ignition pulses for each cylinder in which the timing is retarded from said maximum timing advance as defined by its corresponding code number.

Claim 3

An ignition system as claimed in claim 1 wherein a microprocessor is connected to said memory means, digital signals representative of instantaneous values of at least one engine operating condition are supplied to said microprocessor, and said microprocessor provides code information representative of the average magnitude of spark advance for said instantaneous values and adds or subtracts the necessary offsets in timing from those established in said memory means.

Claim 4

An ignition system as claimed in claim 2 wherein an analog to digital converter is connected to said microprocessor and said signals representing an engine operating condition are supplied to said analog-to-digital converter, said signals being convereted to digital form in said converter and supplied to said microprocessor.

Claim 5

An ignition system as claimed in claim 3 wherein said memory means includes a random access memory and said mircoprocessor includes a random access memory connected to receive digital signals from said analog to digital converter.

Claim 6

An ignition system as claimed in claim 4 wherein said digital signals are representaive of instantaneous values of engine rotational speed and engine load.

Claim 7

An ignition system as claimed in claim 4 wherein said digital signals are representative of instantaneous values of sensed engine knock.

Claim 8

An ignition system as claimed in claim 3 wherein said ignition system includes a plurality of channels, each channel controlling the ignition timing to a particular group of cylinders, said system including an offset counter connected to receive said timing reference pulses and providing a second timing pulse delayed a predetermined number of encoder pulses from said timing reference pulses, at least fourth, fifth and sixth counters corresponding to said first, second and third named counters with said fourth, fifth and sixth counters receiving said encoder pulses and said second timing pulses, a second memory means with said microprocessor being connected to said second memory means, a second variable delay counter and means connecting said fifth counter to said second memory means to cause said second memory means to unload a coded member to said second variable delay counter corresponding to the cylinder number addressed by said sixth counter, said second variable delay counter thereby providing output pulses to said engine establishing ignition timing for a second group of individual cylinders.

Claim 9

An ignition system for providing individual cylinder spark control for multicylinder engines including a shaft encoder directly connected to the engine crankshaft, said encoder being capable of producing a large number of encoder pulses per engine revolution (NC), index means producing a single output pulse per engine revolution times with the top dead center point of a given cylinder, means selecting every other said top dead center pulse as a timing reference (TDC1), a counter connected to receive said encoder pulses and said timing reference to provide a carry pulse after every N encoder count where N is equal to 2NC/number of cylinders of said engine and N counts then represents the theoretical crank angle between successive cylinder top dead center points following each compression stroke, second and third counters connected to receive each carry pulse, said second counter delaying said carry pulse by a fixed number of encoder output pulses and the third counter being incremented one step for each carry pulse and being also connected to be reset by each timing reference pulse to synchronize said third counter with engine rotation, a read only memory having memory locations containing binary numbers representing actual measured individual offset angles for each individual cylinder of the engine being controlled, a variable delay counter and means connecting said second counter to said read only memory and to said variable delay counter to cause said read only memory to unload a binary number to said variable delay counter corresponding to the cylinder number addressed by said third counter, each said binary number being delayed by the fixed number of pulses represented by said second counter, said variable delay counter thereby providing output pulses to said engine establishing ignition timing for said individual cylinders.

Claim 10

An ignition system for providing individual cylinder spark control for multicylinder engines including a shaft encoder directly connected to the engine crankshaft, said encoder being capable of producing a large number of encoder pulses per engine revolution (NC), index means producing a single output pulse per engine revolution times with the top dead center point of a given cylinder, means selecting every other said top dead center pulse as a timing reference (TDC1), a counter connected to receive said encoder pulses and said timing reference to provide a carry pulse after every N encoder count where N is equal to 2NC/number of cylinders of said engine and N counts then represents the theoretical crank angle between successive cylinder top dead center points following each compression stroke, second and third counters connected to receive each carry pulse, said second counter delaying said carry pulse by a fixed number of encoder output pulses and the third counter being incremented one step for each carry pulse and being also connected to be reset by each timing reference pulse to synchronize said third counter with engine rotation, a read only memory having memory locations containing binary numbers representing actual measured individual offset angles for each individual cylinder of the engine being controlled, a variable delay counter and means connecting said second counter to said read only memory and to said variable delay counter to cause said read only memory to unload a binary number to said variable delay counter corresponding to the cylinder number addressed by said third counter, each said binary number being delayed by the fixed number of pulses represented by said second counter, said variable delay counter thereby providing output pulses to said engine establishing ignition timing for said individual cylinders.

Claim 11

An ignition system as claimed in claim 8 wherein a miscroprocessor is connected to said read memory, digital signals representative of instantaneous values of at least one engine operating condition are supplied to said microprocessor, and said microprocessor provides code information representative of the average magnitude of spark advance for said instantaneous values and adds or subtracts the necessary offsets in timing from those established in said read only memory.

Claim 12

An ignition system as claimed in claim 9 wherein an analog to digital converter is connected to said microprocessor and said signals representing an enginer operating condition are supplied to said analog-to-digital converter, said signals being converted to digital form in said converter and supplied to said microprocessor.

Claim 13

An ignition system as claimed in claim 10 wherein said microprocessor includes a second random access memory connected to receive digital signals from said digital to analog converter.

Claim 14

An ignition system as claimed in claim 11 wherein said digital signals are representative of instantaneous values of engine rotational speed and of sensed engine knock.