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US4636652A Expired / Lapsed US ⏱️ 0.0 years remaining

Electric circuit control device

Assignee: Alcatel CIT SA
•
Filing: 1985-06-19
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Granted: 1987-01-13
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Expires: 2005-06-19
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Abstract

Abstract An electronic control device enables a load to be separated from a power supply network for a time corresponding to the period which the load would cause a major disturbance in the network due to the state of the load at the time of a temporary main outage. The electric circuit control device comprises a first, normally open controlled switch (2) connected in the electric circuit, a second, normally closed, controlled switch (4) shunted with the first controlled switch (2), a power supply network (6) for supplying power to the control device, first time delay control network (17) connected to the first controlled switch (2), second time delay control network (30) connected to the second controlled switch (4) and memory network (41) connected to the second controlled switch (4), the time delay of the first control network (17) being at most equal to the time delay of the second control network (30).

Inventors

  • 👤 Marc Raes

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 14:33
CPC Classifications
H; H01; H01H; H01H47/00; H01H47/02; H01H47/18; H05; H05B; H05B47/00; H05B47/10

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 103 words
Electric circuit control device comprising a first, normally open, controlled switch connected in the electric circuit, a second, normally closed, controlled switch shunted with the first controlled switch, means for supplying power to the control device, said means connected in the electric circuit upstream from said first and second controlled switches, first time delay control means connected to said first controlled switch, second time delay control means connected to said second controlled switch and memory means connected to said second controlled switch, the time delay of the first control means being at most equal to the time delay of the second control means.
Claim 2
Dependent Claim 103 words
Electric circuit control device comprising a first, normally open, controlled switch connected in the electric circuit, a second, normally closed, controlled switch shunted with the first controlled switch, means for supplying power to the control device, said means connected in the electric circuit upstream from said first and second controlled switches, first time delay control means connected to said first controlled switch, second time delay control means connected to said second controlled switch and memory means connected to said second controlled switch, the time delay of the first control means being at most equal to the time delay of the second control means.
Claim 3
Dependent Claim 25 words
Device according to claim 1, wherein said memory means comprise a capacitor associated with at least one resistor parallel-connected to the terminals of the capacitor.
Claim 4
Dependent Claim 38 words
Device according to claim 2, wherein said memory means comprise at least a second resistor parallel-connected to the first resistor and series-connected to the first normally-open, controlled switch, the control whereof is connected to the power supply means.
Claim 5
Dependent Claim 64 words
Device according to claims 1 through 3, wherein at least one of the control means of the first and the second controlled switches comprises at least a first flip-flop whose output is connected to the corresponding switch of the time delay means arranged between the power supply means and the first flip-flop and holding means for holding the control means in an activated position.
Claim 6
Dependent Claim 92 words
Device according to claim 4, wherein the time delay means include a resistor one of whose terminals is connected to the supply means and whose other terminal is connected on the one hand to the input of the corresponding first flip-flop and on the other hand to a first terminal of the capacitor and wherein the holding means include a second flip-flop one of the inputs whereof is connected to the output of the first flip-flop and the output whereof is connected to a second terminal of the capacitor, opposite the first.

References Cited (Backward Citations)

US3814950A Cited
US3940660A Cited
US4204128A Cited
US4339693A Cited
US4426639A Cited
US4536693A Cited
US4507569A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1990-01-12 1990-07-14 1991-01-13 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1994-01-12 1994-07-14 1995-01-13 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1998-01-12 1998-07-14 1999-01-13 $7700.00 Window Closed / Lapsed

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