US4633406A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Digital data processing system method for making a general call
Assignee: EMC Corp
•
Filing: 1984-08-20
•
Granted: 1986-12-30
•
Expires: 2004-08-20
Abstract
Abstract A data processing system having a flexible internal structure, protected from and effectively invisible to users, with multilevel control and stack mechanism and capability of performing multiple, concurrent operations, and providing a flexible, simplified interface to users. The system is internally comprised of a plurality of separate, independent processors, each having a separate microinstruction control and at least one separate, independent port to a central communications and memory node. The communications and memory node is an independent processor having separate, independent microinstruction control and comprised of a plurality of independently operating, microinstruction controlled processors capable of performing multiple, concurrent memory and communications operations. Addressing mechanisms allow permanent, unique identification of information and an extremely large address space accessible and common to all such systems. Addresses are independent of system physical configuration. Information is identified to bit granular level and to information type and format. Protection mechanisms provide variable access rights associated with individual bodies of information. User language instructions are transformed into dialect coded, uniform, intermediate level instructions to provide equal facility of execution for all user languages. Operands are referred to by uniform format names which are transformed, by internal mechanisms transparent to users, into addresses.
Inventors
- 👤 Lawrence H. Katz
- 👤 Douglas M. Wells
- 👤 Richard G. Bratt
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 01:30
CPC Classifications
A; A44; A44C; A44C5/00; A44C5/18; A44C5/20
Claims Analysis
Total Claims: 15
Claim 1
Independent Claim
169 words
In a digital computer system including (A) memory means for storing and for providing data including instruction sequences in response to memory signals including addresses specifying locations in said memory mean, and (B) processing means for providing said memory signals and for performing operations by executing an instruction sequence and responding to the instructions thereof, said operations including a call operation suspending the execution of a current instruction sequence and commencing the execution of a new instruction sequence, means for performing a call operation in response to an internal condition of said processor means comprising: fault handling means in said processor means responsive to said internal condition for providing data representing an address of an instruction sequence; and general call operation execution means in said processor means responsive to said fault handling means for receiving at least said provided data, for suspending the execution of the current instruction sequence, and for commencing the execution of a new instruction sequence the address of which is represented by said provided data.
Claim 2
Dependent Claim
169 words
In a digital computer system including (A) memory means for storing and for providing data including instruction sequences in response to memory signals including addresses specifying locations in said memory mean, and (B) processing means for providing said memory signals and for performing operations by executing an instruction sequence and responding to the instructions thereof, said operations including a call operation suspending the execution of a current instruction sequence and commencing the execution of a new instruction sequence, means for performing a call operation in response to an internal condition of said processor means comprising: fault handling means in said processor means responsive to said internal condition for providing data representing an address of an instruction sequence; and general call operation execution means in said processor means responsive to said fault handling means for receiving at least said provided data, for suspending the execution of the current instruction sequence, and for commencing the execution of a new instruction sequence the address of which is represented by said provided data.
Claim 3
Dependent Claim
50 words
In a digital data computer system of claim 1, and further wherein: said fault handling means includes a fault table relating a value representing said internal condition to data representing the address of said new instruction sequence, said fault handling means using said fault table to obtain said provided data.
Claim 4
Dependent Claim
100 words
In a digital computer system of claim 1, and further wherein said provided data includes an argument for use in the execution of the new instruction sequences being commenced by said call operation, wherein said fault handling means includes means for storing said argument in said memory, and means for providing data representing the location of said stored argument to said general call operation effective means; and said general call operation execution means further receives the data repesenting the location of said stored argument and makes said stored argument available for use in the execution of each new instruction sequence.
Claim 5
Dependent Claim
223 words
In a digital computer system including (A) memory means for storing and for providing data including instruction sequences in response to memory signals including addresses specifying locations in said memory means; and (B) processing means for providing said memory signals and for performing operations by executing an instruction sequence and responding to the instructions in said insstruction sequence, means for performing a call operation suspending the execution of a current instruction sequence and commencing the execution of a new instruction sequence comprising: call instruction execution means in said processor means responsive to an instruction specifying a call operation for providing data representing the address said new instruction sequence; fault handling means in said processor means responsive to an internal condition of said processor means for providing data representing the address of a fault-handling instruction sequence corresponding to said internal condition; and general call operation execution means in said processor means responsive to both said fault handling and to said call instruction execution means for receiving the data provided from said call instruction execution means when responding thereto and the data provided from said fault handling means when responding thereto, for suspending the execution of the current instruction sequence, and for commencing the execution of the instruction sequence the address of which is represented by the data provided by said call instruction execution means.
Claim 6
Dependent Claim
223 words
In a digital computer system including (A) memory means for storing and for providing data including instruction sequences in response to memory signals including addresses specifying locations in said memory means; and (B) processing means for providing said memory signals and for performing operations by executing an instruction sequence and responding to the instructions in said insstruction sequence, means for performing a call operation suspending the execution of a current instruction sequence and commencing the execution of a new instruction sequence comprising: call instruction execution means in said processor means responsive to an instruction specifying a call operation for providing data representing the address said new instruction sequence; fault handling means in said processor means responsive to an internal condition of said processor means for providing data representing the address of a fault-handling instruction sequence corresponding to said internal condition; and general call operation execution means in said processor means responsive to both said fault handling and to said call instruction execution means for receiving the data provided from said call instruction execution means when responding thereto and the data provided from said fault handling means when responding thereto, for suspending the execution of the current instruction sequence, and for commencing the execution of the instruction sequence the address of which is represented by the data provided by said call instruction execution means.
Claim 7
Dependent Claim
181 words
In a digital computer system of claim 4, and further wherein data provided by said call instruction execution means includes an argument for use in the execution of the new instruction sequence being commenced by said call operation, said call instruction further specifying said argument; said call instruction execution means further including means for storing the argument specified by said call instruction in said memory means and for providing data representing the location of said stored argument to said general call operation execution means; said fault handling means includes means for storing an argument for said fault-handling instruction sequence in said memory means and for providing data representing the location of said stored argument to said general call operation execution means; and said general call operation execution means receives the data representing the location of the stored argument from said call instruction execution means when responding thereto and the data representing the location of the stored argument from said fault handling means when responding thereto and makes said stored argument available for use in the execution of the called instruction sequence.
Claim 8
Dependent Claim
50 words
In a digital computer system of claim 4, and further wherein said fault handling means includes a fault table relating a value representing said internal condition to the data representing the address of said new instruction sequence; said fault handling means using said fault table to obtain said provided data.
Claim 9
Independent Claim
65 words
A method for performing a call operation in a digital computer system in response to an internal condition of said system when said system is executing a current instruction sequence, said method comprising: providing data representing an address of a new instruction sequence when said internal condition arises; suspending the execution of said current instruction sequence; and commencing the execution of said new instruction sequence.
Claim 10
Independent Claim
65 words
A method for performing a call operation in a digital computer system in response to an internal condition of said system when said system is executing a current instruction sequence, said method comprising: providing data representing an address of a new instruction sequence when said internal condition arises; suspending the execution of said current instruction sequence; and commencing the execution of said new instruction sequence.
Claim 11
Dependent Claim
37 words
A method of claim 7 wherein said data providing step includes: relating a value representing said internal condition to data representing the address of said new instruction sequence; and using said related value to obtain said data.
Claim 12
Dependent Claim
58 words
A method of claim 7 wherein said data includes an argument for use in the execution of said new instruction sequence and further including storing said argument; providing data representing the stored location of said stored argument; using the data so provided to make said stored argument available for use in the execution of said new instruction sequence.
Claim 13
Independent Claim
130 words
A method for performing a call operation in a digital computer system in response to a call instruction specifying a particular call operation or in response to an internal condition of said system when said system is executing a current instruction sequence, said method comprising: providing data representing the address of a new instruction sequence when said call instruction specifying said particular call operation is provided; providing data represting the address of a fault handling instruction sequence when said internal condition occurs; suspending the execution of said current instruction sequence when the address data of said new instruction sequence is provided or when the address data of said fault handling instruction sequence is provided; and commencing the execution of the instruction sequence the address data of which is so provided.
Claim 14
Independent Claim
130 words
A method for performing a call operation in a digital computer system in response to a call instruction specifying a particular call operation or in response to an internal condition of said system when said system is executing a current instruction sequence, said method comprising: providing data representing the address of a new instruction sequence when said call instruction specifying said particular call operation is provided; providing data represting the address of a fault handling instruction sequence when said internal condition occurs; suspending the execution of said current instruction sequence when the address data of said new instruction sequence is provided or when the address data of said fault handling instruction sequence is provided; and commencing the execution of the instruction sequence the address data of which is so provided.
Claim 15
Dependent Claim
93 words
A method of claim 10 and further including providing data including an argument for use in the execution of said new instruction sequence; storing said argument data providing data representing the location of said stored argument; providing data including an argument for use in the execution of said fault handling instruction sequence; storing said argument data; providing data representing the location of said stored argument; making the stored argument data available for use in said new instruction sequence or making the stored argument data available for use in said fault handling instruction sequence.
References Cited (Backward Citations)
US4297743A
Cited
US4041462A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1989-12-29 | 1990-06-30 | 1990-12-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1993-12-29 | 1994-06-30 | 1994-12-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1997-12-29 | 1998-06-30 | 1998-12-30 | $7700.00 | Window Closed / Lapsed |