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US4633337A Expired / Lapsed US ⏱️ 0.0 years remaining

Floppy disk driving with suitable on-delay and off-delay timing

Assignee: Sharp Corp
•
Filing: 1985-03-25
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Granted: 1986-12-30
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Expires: 2005-03-25
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Abstract

Abstract A floppy disk driving circuit comprises a memory circuit for storing a plurality of items of delay time of a pair of erase heads from the switching-ON and the switching-OFF of a read/write head for all the tracks of a floppy disk, a control circuit responsive to the memory circuit for controlling ON- and OFF-delay timing of the pair of erase heads based on the plurality of items of delay timing. The plurality of items of suitable timing are previously calculated in connection with the respective tracks of the disk and stored within the memory circuit.

Inventors

  • 👤 Nobuyuki Horie
  • 👤 Yoshiki Nishioka
  • 👤 Noriaki Sakamoro
  • 👤 Toshiaki Fujikawa
  • 👤 Toshihiro Yamanaka

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-27 12:32
CPC Classifications
G; G11; G11B; G11B5/00; G11B5/012; G11B5/016; G11B19/00; G11B19/02

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 310 words
A floppy disk driving circuit for writing information onto and reading information from a floppy disk having a plurality of concentric information storage tracks each identified by identification fields, comprising: read/write means including a read/write head operatively disposed adjacent said floppy disk for storing information on a selected said track thereof, said read/write head being positioned in juxtaposition to a selected said track; means for developing a write gate signal, said write gate signal enabling said read/write means to write information onto said selected said track of said floppy disk; digital memory means for storing time interval data associated with each one of said plurality of tracks at a plurality of addresses associated therewith, said time interval data associated with said selected said track being developed as an output of said memory means; oscillator means for developing clock pulses; counter means enabled by the development of said write gate signal, for counting said clock pulses developed by said oscillator means, said counter means developing an erase enable output after a selected number of clock pulses have been counted, said counter means being operatively connected to said read only memory means and having a variable division ratio set by said time interval data provided by said memory means to thereby determine said selected number; an erase head for tunnel erasing said selected said track; and flip-flop means responsive to said write gate signal and said erase enable output for developing a control output to drive said erase head, said flip-flop means developing said control output upon receipt of said write gate signal and said erase enable output and terminating development of said control output when both said write gate signal and erase enable output are not developed; said drive circuit thereby driving said erase head to perform tunnel erasing on the entirety of said information storage track except said information field.
Claim 2
Dependent Claim 310 words
A floppy disk driving circuit for writing information onto and reading information from a floppy disk having a plurality of concentric information storage tracks each identified by identification fields, comprising: read/write means including a read/write head operatively disposed adjacent said floppy disk for storing information on a selected said track thereof, said read/write head being positioned in juxtaposition to a selected said track; means for developing a write gate signal, said write gate signal enabling said read/write means to write information onto said selected said track of said floppy disk; digital memory means for storing time interval data associated with each one of said plurality of tracks at a plurality of addresses associated therewith, said time interval data associated with said selected said track being developed as an output of said memory means; oscillator means for developing clock pulses; counter means enabled by the development of said write gate signal, for counting said clock pulses developed by said oscillator means, said counter means developing an erase enable output after a selected number of clock pulses have been counted, said counter means being operatively connected to said read only memory means and having a variable division ratio set by said time interval data provided by said memory means to thereby determine said selected number; an erase head for tunnel erasing said selected said track; and flip-flop means responsive to said write gate signal and said erase enable output for developing a control output to drive said erase head, said flip-flop means developing said control output upon receipt of said write gate signal and said erase enable output and terminating development of said control output when both said write gate signal and erase enable output are not developed; said drive circuit thereby driving said erase head to perform tunnel erasing on the entirety of said information storage track except said information field.
Claim 3
Dependent Claim 17 words
The floppy disk driving circuit of claim 1 wherein said memory means is a read only memory.
Claim 4
Dependent Claim 16 words
The floppy disk driving circuit of claim 2 wherein said flip-flop means is a D-type flip-flop.

References Cited (Backward Citations)

US4300174A Cited
JPS56117308A Cited
US4466025A Cited
US4442463A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1989-12-29 1990-06-30 1990-12-30 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1993-12-29 1994-06-30 1994-12-30 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1997-12-29 1998-06-30 1998-12-30 $7700.00 Window Closed / Lapsed

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