Patent EP0236945A2 successfully refreshed from Google Patents.
US4633192A
Expired / Lapsed
US
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Integrated circuit operating as a current-mirror type CMOS amplifier
Assignee: Mitsubishi Electric Corp
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Filing: 1984-05-07
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Granted: 1986-12-30
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Expires: 2004-05-07
Abstract
Abstract An integrated circuit operates as a current-mirror type CMOS amplifier. The integrated circuit is constructed of a first inverter and a second inverter. The first inverter is formed of a first P-channel FET whose source is connected to a power supply with a gate and a drain thereof being connected to a first node; and a first N-channel FET whose drain is connected to the first node with a gate thereof being connected to a first input terminal and with a source thereof being earthed. The second inverter is formed of a second P-channel FET whose source is connected to a power supply with a gate thereof being connected to the first node and with a drain thereof being connected to a second node; and a second N-channel FET whose drain is connected to the second node with a gate thereof being connected to a second input terminal and with a source thereof being earthed. The first inverter and the second inverter having different conductances which vary according to a predetermined ratio in order to reduce current consumption.
Inventors
- 👤 Kenji Anami
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 23:50
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/34; H03F3/343; H03F3/345
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
194 words
An integrated circuit operating as a current-mirror type CMOS amplifier, the integrated circuit comprising: a first P-channel FET whose source is connected to a power supply with a gate and a drain thereof being connected to a first node; a first N-channel FET whose drain is connected to the first node with a gate thereof being connected to a first input terminal and with a source thereof being earthed; a first inverter constituted by the first P-channel FET and the first N-channel FET; a second P-channel FET whose source is connected to a power supply with a gate thereof being connected to the first node and with a drain thereof being connected to a second node; a second N-channel FET whose drain is connected to the second node with a gate thereof being connected to a second input terminal and with a source thereof being earthed; a second inverter constituted by the second P-channel FET and the second N-channel FET; and the conductance of the first P-channel FET being smaller than that of the second P-channel FET, and the conductance of the first N-channel FET being smaller than that of the second N-channel FET.
Claim 2
Dependent Claim
194 words
An integrated circuit operating as a current-mirror type CMOS amplifier, the integrated circuit comprising: a first P-channel FET whose source is connected to a power supply with a gate and a drain thereof being connected to a first node; a first N-channel FET whose drain is connected to the first node with a gate thereof being connected to a first input terminal and with a source thereof being earthed; a first inverter constituted by the first P-channel FET and the first N-channel FET; a second P-channel FET whose source is connected to a power supply with a gate thereof being connected to the first node and with a drain thereof being connected to a second node; a second N-channel FET whose drain is connected to the second node with a gate thereof being connected to a second input terminal and with a source thereof being earthed; a second inverter constituted by the second P-channel FET and the second N-channel FET; and the conductance of the first P-channel FET being smaller than that of the second P-channel FET, and the conductance of the first N-channel FET being smaller than that of the second N-channel FET.
Claim 3
Dependent Claim
45 words
An integrated circuit as defined in claim 1, wherein the ratio of the conductances of the first P-channel FET and the second P-channel FET is set to be equal to the ratio of the conductances of the first N-channel FET and the second N-channel FET.
Claim 4
Dependent Claim
147 words
A current-mirror amplifier circuit comprising: a first inverter including, a first P-channel FET havng a source connected to a power supply and a gate and a drain connected to a first node, a first N-channel FET having a drain connected to the first node, a gate connected to a first input terminal and a source being earthed; a second inverter including, a second P-channel FET having a source connected to a power supply, a gate connected to the first node and a drain connected to a second node, a second N-channel FET having a drain connected to the second node, a gate connected to a second input terminal, and a source being earthed; the conductance of said second N-channel FET being greater than the conductant of said first N-channel FET, the conductance of said second P-channel FET being greater than the conductant of said first P-channel FET.
Claim 5
Dependent Claim
147 words
A current-mirror amplifier circuit comprising: a first inverter including, a first P-channel FET havng a source connected to a power supply and a gate and a drain connected to a first node, a first N-channel FET having a drain connected to the first node, a gate connected to a first input terminal and a source being earthed; a second inverter including, a second P-channel FET having a source connected to a power supply, a gate connected to the first node and a drain connected to a second node, a second N-channel FET having a drain connected to the second node, a gate connected to a second input terminal, and a source being earthed; the conductance of said second N-channel FET being greater than the conductant of said first N-channel FET, the conductance of said second P-channel FET being greater than the conductant of said first P-channel FET.
Claim 6
Dependent Claim
72 words
The circuit of claim 3 wherein the ratio of the conductances of said first P-channel FET and said first N-channel FET is equal to the ratio of the conductances of said second P-channel FET and said second N-channel FET; the ratio of the conductances of said first P-channel FET and said second P-channel FET being equal to the ratio of the conductances of said first N-channel FET and said second N-channel FET.
Claim 7
Dependent Claim
19 words
The current-mirror amplifier circuit of claim 3 where said amplifier circuit is formed as a CMOS type integrated circuit.
References Cited (Backward Citations)
US4267517A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1989-12-29 | 1990-06-30 | 1990-12-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1993-12-29 | 1994-06-30 | 1994-12-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1997-12-29 | 1998-06-30 | 1998-12-30 | $7700.00 | Window Closed / Lapsed |