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US4631600A Expired / Lapsed US ⏱️ 0.0 years remaining

Time-axis correcting circuit for recorded data reproducing device

Assignee: Pentax Corp
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Filing: 1984-04-24
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Granted: 1986-12-23
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Expires: 2004-04-24
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Abstract

Abstract A time-axis correcting circuit for a recorded data reproducing device such as a video disc player in which, even when a dominant time-axis error component is not a single-frequency component, suppression thereof is sufficiently achieved with a relatively simple circuit configuration. The time-axis correcting circuit includes first and second time-axis correcting circuits, each of which has a flywheel oscillator servo loop. The oscillation frequency of the first flywheel oscillator servo loop is set close to the lowest frequency of the dominant time-axis error component to be suppressed while that of the second time-axis correcting circuit is set close to the highest frequency of the dominant time-axis error component to be suppressed.

Inventors

  • 👤 Tsutomu Fukui

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-26 01:53
CPC Classifications
G; G11; G11B; G11B19/00; G11B19/20; G11B20/00; G11B20/10; G11B20/18; G11B7/00; G11B7/08; G11B7/081; H; H04; H04N; H04N5/00; H04N5/76; H04N5/91; H04N5/93; H04N5/95; H04N5/953

Claims Analysis

Total Claims: 10
Claim 1
Independent Claim 97 words
A time-axis correcting circuit for a recorded data reproducing device, comprising: a first time-axis correcting circuit, comprising a first flywheel oscillator loop, for suppressing a time-axis error component having a frequency equal to a first predetermined oscillation frequency of said first flywheel oscillator servo loop; and a second time-axis correcting circuit, comprising a second flywheel oscillator loop, for suppressing a time-axis error component having a frequency equal to a second predetermined oscillation frequency of said second flywheel oscillator servo loop different from said first predetermined oscillation frequency, said first and second time-axis correcting circuits being cascade connected.
Claim 2
Dependent Claim 97 words
A time-axis correcting circuit for a recorded data reproducing device, comprising: a first time-axis correcting circuit, comprising a first flywheel oscillator loop, for suppressing a time-axis error component having a frequency equal to a first predetermined oscillation frequency of said first flywheel oscillator servo loop; and a second time-axis correcting circuit, comprising a second flywheel oscillator loop, for suppressing a time-axis error component having a frequency equal to a second predetermined oscillation frequency of said second flywheel oscillator servo loop different from said first predetermined oscillation frequency, said first and second time-axis correcting circuits being cascade connected.
Claim 3
Dependent Claim 69 words
The time-axis correcting circuit as claimed in claim 1, wherein: said first predetermined oscillation frequency of said first flywheel oscillator servo loop is at least close to a lowest frequency of a dominant time-axis error component to be suppressed; and said second predetermined oscillation frequency of said second flywheel oscillator servo loop is at least close to a highest frequency of said dominant time-axis error component to be suppressed.
Claim 4
Dependent Claim 96 words
The time-axis correcting circuit as claimed in claim 1, wherein: said recorded data reproducing device comprises an optical video disc player; said first time-axis correcting circuit comprises a coarse adjustment circuit using a horizontal synchronizing signal of a demodulated video signal as timing data; said second time-axis correcting circuit comprises a fine adjustment circuit using a color burst signal of said demodulated video signal as timing data; said first predetermined oscillation frequency of said coarse adjustment circuit is about 10 Hz; and said second predetermined oscillation frequency of said fine adjustment circuit is about 30 Hz.
Claim 5
Dependent Claim 61 words
The time-axis correcting circuit as claimed in claim 1, further comprising means for supplying a demodulated video signal of said recorded data reproducing device to an input of said first time-axis correcting circuit, and means for applying an output of said second time-axis correcting circuit to a spindle motor rotating a video disc to be reproduced by said recorded reproducing device.
Claim 6
Dependent Claim 129 words
The time-axis correcting circuit as claimed in claim 1, wherein said first time-axis correcting circuit and said second time-axis correcting circuit each comprise: a variable delay circuit; a separating circuit having an input coupled to an output of said variable delay circuit; a phase comparator having a first input coupled to an output of said separator circuit; a first voltage-controlled oscillator having an input coupled to an output of said phase comparator and an output coupled to a second input of said phase comparator; a second voltage-controlled oscillator having an input coupled to said output of said phase comparator; and a drive circuit having an input coupled to an output of said second voltage-controlled oscillator and an output coupled to a delay control input of said variable delay circuit.
Claim 7
Dependent Claim 467 words
A time-axis correcting circuit for a recorded data reproducing device, comprising: means for extracting a baseband video signal from an optical signal provided from a video disc to be reproduced; a first separating circuit receiving said base band video signal for separating a horizontal synchronizing signal from said baseband video signal; a reference signal generator; a first phase comparator receiving as inputs an output of said first separating circuit and a reference signal produced by said reference signal generator; a phase correcting circuit having an input coupled to an output of said first phase comparator, an output of said phase correcting circuit being applied to control a motor rotating said video disc; a first variable delay circuit receiving as an input said baseband video signal; a second separating circuit having an input coupled to an output of said first variable delay circuit for extracting a horizontal synchronizing signal from an output signal of said first variable delay circuit; a second phase comparator having a first input coupled to an output of said second separating circuit; a first voltage-controlled oscillator having an input coupled to an output of said second phase comparator and an output coupled to a second input of said second phase comparator; a second voltage-controlled oscillator having an input coupled to said output of said second phase comparator; a first drive circuit having an input coupled to an output of said second voltage-controlled oscillator and an output coupled to a delay control input of said first variable delay circuit; a second variable delay circuit having an input coupled to said output of said first variable delay circuit; a third separating circuit having an input coupled to an output of said second variable delay circuit for separating a color burst signal from an output signal of said second variable delay circuit; a third phase comparator having a first input coupled to an output of said third separating circuit; a third voltage-controlled oscillator having an input coupled to an output of said third phase comparator and an output coupled to a second input of said third phase comparator; a fourth voltage-controlled oscillator having an input coupled to said output of said third phase comparator; and a second drive circuit having an input coupled to an output of said fourth voltage-controlled oscillator and an output coupled to a delay control input of said second variable delay circuit, said first voltage-controlled oscillator and said second phase comparator forming a sub servo loop having an open-loop oscillation frequency at least close to a lowest frequency of a dominant time-axis error component to be suppressed, and said third voltage-controlled oscillator and said third phase comparator forming a sub servo loop having an open-loop oscillation frequency at least close to a highest frequency of said dominant time-axis error component to be suppressed.
Claim 8
Dependent Claim 467 words
A time-axis correcting circuit for a recorded data reproducing device, comprising: means for extracting a baseband video signal from an optical signal provided from a video disc to be reproduced; a first separating circuit receiving said base band video signal for separating a horizontal synchronizing signal from said baseband video signal; a reference signal generator; a first phase comparator receiving as inputs an output of said first separating circuit and a reference signal produced by said reference signal generator; a phase correcting circuit having an input coupled to an output of said first phase comparator, an output of said phase correcting circuit being applied to control a motor rotating said video disc; a first variable delay circuit receiving as an input said baseband video signal; a second separating circuit having an input coupled to an output of said first variable delay circuit for extracting a horizontal synchronizing signal from an output signal of said first variable delay circuit; a second phase comparator having a first input coupled to an output of said second separating circuit; a first voltage-controlled oscillator having an input coupled to an output of said second phase comparator and an output coupled to a second input of said second phase comparator; a second voltage-controlled oscillator having an input coupled to said output of said second phase comparator; a first drive circuit having an input coupled to an output of said second voltage-controlled oscillator and an output coupled to a delay control input of said first variable delay circuit; a second variable delay circuit having an input coupled to said output of said first variable delay circuit; a third separating circuit having an input coupled to an output of said second variable delay circuit for separating a color burst signal from an output signal of said second variable delay circuit; a third phase comparator having a first input coupled to an output of said third separating circuit; a third voltage-controlled oscillator having an input coupled to an output of said third phase comparator and an output coupled to a second input of said third phase comparator; a fourth voltage-controlled oscillator having an input coupled to said output of said third phase comparator; and a second drive circuit having an input coupled to an output of said fourth voltage-controlled oscillator and an output coupled to a delay control input of said second variable delay circuit, said first voltage-controlled oscillator and said second phase comparator forming a sub servo loop having an open-loop oscillation frequency at least close to a lowest frequency of a dominant time-axis error component to be suppressed, and said third voltage-controlled oscillator and said third phase comparator forming a sub servo loop having an open-loop oscillation frequency at least close to a highest frequency of said dominant time-axis error component to be suppressed.
Claim 9
Dependent Claim 404 words
A time-axis correcting circuit comprising: means for extracting a baseband video signal from an optical output signal from a video disc to be reproduced; a first separating circuit for separating from said baseband video signal a horizontal synchronizing signal; a first phase comparator having a first input coupled to an output of said first separating circuit; a first voltage-controlled oscillator having an input coupled to an output of said first phase comparator and an output coupled to a second input of said first phase comparator; a phase correcting circuit having an input coupled to said output of said first phase comparator and an output applied to control a tangential mirror for controlling a tangential position of an illuminating beam upon said video disc; a second phase comparator having a first input coupled to said output of said first separating circuit; a reference signal generating circuit having an output coupled to a second input of said second phase comparator; a signal summing circuit for summing an output of said phase correcting circuit and an output of said second phase comparator; a second phase correcting circuit having an input coupled to an output of said summing circuit and an output applied to control a motor rotating said disc; a variable delay circuit having an input receiving said baseband video signal; a second separating circuit for separating a color burst signal from an output signal of said variable delay circuit; a third phase comparator having a first input coupled to an output of said second separating circuit; a second voltage-controlled oscillator having an input coupled to an output of said third phase comparator and an output coupled to a second input of said third phase comparator; a third voltage-controlled oscillator having an input coupled to said output of said third phase comparator; and a drive circuit having an input coupled to an output of said voltage-controlled oscillator and an output applied to a delay time control terminal of said variable delay circuit, an open-loop oscillation frequency of a sub servo loop formed by said first voltage-controlled oscillator and said first phase comparator being at least close to a lowest frequency of a dominant time-axis error component to be suppressed, and an open-loop oscillation frequency of a sub servo loop formed by said second voltage-controlled oscillator and said third phase comparator being at least close to a highest frequency of said dominant time-axis error component to be suppressed.
Claim 10
Dependent Claim 404 words
A time-axis correcting circuit comprising: means for extracting a baseband video signal from an optical output signal from a video disc to be reproduced; a first separating circuit for separating from said baseband video signal a horizontal synchronizing signal; a first phase comparator having a first input coupled to an output of said first separating circuit; a first voltage-controlled oscillator having an input coupled to an output of said first phase comparator and an output coupled to a second input of said first phase comparator; a phase correcting circuit having an input coupled to said output of said first phase comparator and an output applied to control a tangential mirror for controlling a tangential position of an illuminating beam upon said video disc; a second phase comparator having a first input coupled to said output of said first separating circuit; a reference signal generating circuit having an output coupled to a second input of said second phase comparator; a signal summing circuit for summing an output of said phase correcting circuit and an output of said second phase comparator; a second phase correcting circuit having an input coupled to an output of said summing circuit and an output applied to control a motor rotating said disc; a variable delay circuit having an input receiving said baseband video signal; a second separating circuit for separating a color burst signal from an output signal of said variable delay circuit; a third phase comparator having a first input coupled to an output of said second separating circuit; a second voltage-controlled oscillator having an input coupled to an output of said third phase comparator and an output coupled to a second input of said third phase comparator; a third voltage-controlled oscillator having an input coupled to said output of said third phase comparator; and a drive circuit having an input coupled to an output of said voltage-controlled oscillator and an output applied to a delay time control terminal of said variable delay circuit, an open-loop oscillation frequency of a sub servo loop formed by said first voltage-controlled oscillator and said first phase comparator being at least close to a lowest frequency of a dominant time-axis error component to be suppressed, and an open-loop oscillation frequency of a sub servo loop formed by said second voltage-controlled oscillator and said third phase comparator being at least close to a highest frequency of said dominant time-axis error component to be suppressed.

References Cited (Backward Citations)

US4123773A Cited
US4313129A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1989-12-22 1990-06-23 1990-12-23 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1993-12-22 1994-06-23 1994-12-23 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1997-12-22 1998-06-23 1998-12-23 $7700.00 Window Closed / Lapsed

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