US4630299A
Expired / Lapsed
US
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Digital circuit for decoding digitized, demodulated FM stereo signals
Assignee: RCA Licensing Corp
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Filing: 1985-02-22
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Granted: 1986-12-16
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Expires: 2005-02-22
Abstract
Abstract A simple digital filter having only a single multiplier operates to extract the pilot tone from a demodulated and digitized FM stereo signal. The number of poles in the filter is chosen so that the filter output is also usable to produce a digitized representation of the carrier tone for the left minus right stereo channel. This signal is in turn used to decode the input representation into the desired left and right channel signals. The circuit of the present invention is particularly amenable to fabrication on an integrated circuit chip.
Inventors
- 👤 II Kenneth B. Welles
- 👤 Sharbel E. Noujaim
- 👤 Jerome J. Tiemann
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 15:25
CPC Classifications
H; H04; H04S; H04S5/00; H04H; H04H20/00; H04H20/44; H04H20/46; H04H20/47; H04H20/48; H03; H03H; H03H17/00; H03H17/02; H03H17/04; H04B; H04B1/00; H04B1/06; H04B1/16; H04B1/1646
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
184 words
A digital circuit for decoding a demodulated and digitized FM stereo signal comprising at least stereo carrier, L+R, and L-R signals into digitized left and right channel components, said circuit comprising: a digital filter for receiving said digitized FM stereo signal as an input sequence x(nT) and generating an output sequence y(nT), said filter having a z-transform transfer function substantially equal to ##EQU4## where N is a real number greater than 2 and H is a scale factor, said filter operating a sampling rate with period T corresponding to a sampling rate which is substantially equal to 228 kHz; a first digital multiplier circuit for forming the product of the output of said filter at time nT, y(nT), with the output of said filter at time (n-3)T, y(nT-3T), so as to form a digitized representation of the stereo carrier signal, c(nT); and a second digital multiplier circuit for forming the product of the input to said filter at time nT, x(nT), with the output of said first digital multiplier at time nT, c(nT), so as to form a digitized representation of the L-R signal.
Claim 2
Dependent Claim
184 words
A digital circuit for decoding a demodulated and digitized FM stereo signal comprising at least stereo carrier, L+R, and L-R signals into digitized left and right channel components, said circuit comprising: a digital filter for receiving said digitized FM stereo signal as an input sequence x(nT) and generating an output sequence y(nT), said filter having a z-transform transfer function substantially equal to ##EQU4## where N is a real number greater than 2 and H is a scale factor, said filter operating a sampling rate with period T corresponding to a sampling rate which is substantially equal to 228 kHz; a first digital multiplier circuit for forming the product of the output of said filter at time nT, y(nT), with the output of said filter at time (n-3)T, y(nT-3T), so as to form a digitized representation of the stereo carrier signal, c(nT); and a second digital multiplier circuit for forming the product of the input to said filter at time nT, x(nT), with the output of said first digital multiplier at time nT, c(nT), so as to form a digitized representation of the L-R signal.
Claim 3
Dependent Claim
70 words
The signal circuit of claim 1 further comprising: a digital summation circuit to form the sum of said L-R signal from said second digital multiplier and said input signal x(nT), whereby a signal representing said left stereo channel information is produced; and a digital subtraction circuit to form the difference between said L-R signal and said input signal x(nT), whereby a signal representing said right stereo channel information is produced.
Claim 4
Dependent Claim
11 words
The circuit of claim 1 in which N is an integer.
Claim 5
Dependent Claim
8 words
The circuit of claim 1 in which N=8.
Claim 6
Dependent Claim
65 words
A digital filter circuit for receiving an input sequence x(nT) and generating an output sequence y(nT), said filter having a z-transform transfer function substantially equal to ##EQU5## where N is a real number greater than 2 and H is a scale factor, said filter operating at a sampling rate with period T which corresponds to a sampling rate which is substantially equal to 228 kHz.
Claim 7
Dependent Claim
65 words
A digital filter circuit for receiving an input sequence x(nT) and generating an output sequence y(nT), said filter having a z-transform transfer function substantially equal to ##EQU5## where N is a real number greater than 2 and H is a scale factor, said filter operating at a sampling rate with period T which corresponds to a sampling rate which is substantially equal to 228 kHz.
References Cited (Backward Citations)
US4569072A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1989-12-15 | 1990-06-16 | 1990-12-16 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1993-12-15 | 1994-06-16 | 1994-12-16 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1997-12-15 | 1998-06-16 | 1998-12-16 | $7700.00 | Window Closed / Lapsed |