US4629914A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Phase comparing circuit
Assignee: Sony Corp
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Filing: 1984-05-17
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Granted: 1986-12-16
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Expires: 2004-05-17
Abstract
Abstract A phase comparing circuit can be made as a semiconductor integrated circuit for inclusion in a phase-locked loop for generating a phase-locked output signal synchronized with a pilot signal. The phase comparing circuit generates first and second reference signals with reverse polarity about their DC level from the pilot signal and first and second base signals having a DC level substantially the same as the DC level of the reference signals. First and second switching signals with reverse polarity about their DC level are generated from the phase-locked output signal. A plurality of bipolar transistors are operated by the switching signals alternately to provide first and third current paths and second and fourth current paths connecting the reference and base signals to cancel the DC components therefrom. A control signal generating circuit provides a control signal current path that connects the first and third current paths and the second and fourth current paths. The control signal current path includes two control signal output terminals that have two series-connected resistors between them and a bias potential connected between the output terminals. The control signal at the output terminals represents the difference in phase between the switching and the pilot signals and is used to generate a locking signal for controlling a voltage-controlled oscillator which provides the phase-locked output signal.
Inventors
- 👤 Taiwa Okanobu
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 08:43
CPC Classifications
H; H03; H03L; H03L7/00; H03L7/06; H03L7/16; H03L7/18; H03L7/183; H03L7/191; H03L7/08; H03L7/085
Claims Analysis
Total Claims: 15
Claim 1
Independent Claim
238 words
A phase comparing circuit for generating a control signal representative of the difference in phase between an input signal and a pilot signal, the circuit comprising: converting means responsive to the pilot signal for converting the pilot signal into a first reference signal and a second reference signal of opposite polarity to said first reference signal; a voltage source; base signal generating means connected to said voltage source for providing first and second base signals having a predetermined DC level substantially the same as a DC level of said reference signals; phase-difference signal generating means connected to the converting means and the base signal generating means and operable in response to the input signal for alternately providing first and second current paths connecting said first base signal and said second reference signal to cancel DC components therefrom and for alternately providing third and fourth current paths connecting said second base signal and the first reference signal to cancel DC components therefrom, said first and third current paths and said second and fourth current paths being provided together; and voltage deriving circuit means connected to the phase-difference signal generating means and including a control signal current path connecting said first and third current paths with said second and fourth current paths and having two control signal output terminals, two series-connected resistors between said control signal output terminals, and a bias terminal between said resistors for accepting a bias potential.
Claim 2
Dependent Claim
238 words
A phase comparing circuit for generating a control signal representative of the difference in phase between an input signal and a pilot signal, the circuit comprising: converting means responsive to the pilot signal for converting the pilot signal into a first reference signal and a second reference signal of opposite polarity to said first reference signal; a voltage source; base signal generating means connected to said voltage source for providing first and second base signals having a predetermined DC level substantially the same as a DC level of said reference signals; phase-difference signal generating means connected to the converting means and the base signal generating means and operable in response to the input signal for alternately providing first and second current paths connecting said first base signal and said second reference signal to cancel DC components therefrom and for alternately providing third and fourth current paths connecting said second base signal and the first reference signal to cancel DC components therefrom, said first and third current paths and said second and fourth current paths being provided together; and voltage deriving circuit means connected to the phase-difference signal generating means and including a control signal current path connecting said first and third current paths with said second and fourth current paths and having two control signal output terminals, two series-connected resistors between said control signal output terminals, and a bias terminal between said resistors for accepting a bias potential.
Claim 3
Dependent Claim
29 words
A phase comparing circuit as in claim 1; wherein said phase-difference signal generating means includes a plurality of bipolar transistors having the conductivity thereof controlled by the input signal.
Claim 4
Dependent Claim
30 words
A phase comparing circuit as in claim 2; wherein the input signal includes a first switching signal and a second switching signal of opposite polarity to the first switching signal.
Claim 5
Dependent Claim
171 words
A phase comparing circuit as in claim 3; wherein: said plurality of bipolar transistors is at least eight in number and includes first, second, fifth and sixth transistors of one type and third, fourth, seventh and eighth transistors of the other type; the emitters of said first and second transistors, of said third and fourth transistors, of said fifth and sixth transistors and of said seventh and eighth transistors, respectively, are connected for receiving, respectively, said first reference signal, said first base signal, said second reference signal and second base signal; the collectors of said first, third, fifth and seventh transistors are connected to one of said control signal output terminals and the collectors of said second, fourth, sixth and eighth transistors are connected to the other said control signal output terminal; and the bases of said first, third, sixth and eighth transistors are connected for receiving one of the switching signals and the bases of said second, fourth, fifth and seventh transistors are connected for receiving the other switching signal.
Claim 6
Dependent Claim
40 words
A phase comparing circuit as in claim 1; wherein said first reference signal and said first base signal are substantially identical and in phase and said second reference signal and said second base signal are substantially identical and in phase.
Claim 7
Dependent Claim
84 words
A phase comparing circuit as in claim 5; wherein the pilot signal includes a first pilot component and a second pilot component of opposite polarity to the first pilot component and said converting means and said base signal generating means include a plurality of constant current sources for providing said first reference signal and said first base signal in response to the first pilot component and for providing said second reference signal and said second base signal in response to the second pilot component.
Claim 8
Dependent Claim
112 words
A phase comparing circuit as in claim 6; wherein: said converting means includes a first converting current mirror having an input transistor for accepting the first pilot component and a first reference-signal output transistor for providing said first reference signal and a second converting current mirror having an input transistor for accepting the second pilot component and a second reference-signal output transistor for providing said second reference signal; and said base signal generating means includes first and second base-signal output transistors in said respective converting current mirrors and first and second base-signal current mirrors connected with said first and second base-signal output transistors for providing said first and second base signals, respectively.
Claim 9
Dependent Claim
26 words
A phase comparing circuit as in claim 7; wherein said first and second base-signal current mirrors have a reference potential of about 1.8 volts applied thereto.
Claim 10
Dependent Claim
191 words
A phase comparing circuit as in claim 6; wherein: the input signal includes a first switching signal and a second switching signal of opposite polarity to the first switching signal; said phase-difference signal generating means includes at least eight bipolar transistors, including first, second, fifth and sixth transistors of one type and third, fourth, seventh and eighth transistors of the other type; the emitters of said first and second transistors, of said third and fourth transistors, of said fifth and sixth transistors and of said seventh and eighth transistors, respectively, are connected for receiving, respectively, said first reference signal, said first base signal, said second reference signal and second base signal; the collectors of said first, third, fifth and seventh transistors are connected to one of said control signal output terminals and the collectors of said second, fourth, sixth and eighth transistors are connected to the other said control signal output terminals; and the bases of said first, third, sixth and eighth transistors are connected for receiving one of the switching signals and the bases of said second, fourth, fifth and seventh transistors are connected for receiving the other switching signal.
Claim 11
Dependent Claim
32 words
A phase comparing circuit as in claim 1; wherein said first and second base signals comprise a DC signal of substantially the same level as the DC level of the pilot signal.
Claim 12
Dependent Claim
83 words
A phase comparing circuit as in claim 10; wherein the pilot signal includes a first pilot component and a second pilot component of opposite polarity to the first pilot component, said converting means includes a plurality of constant current sources for providing said first and second reference signals in response to the first and second pilot components and said base signal generating means comprises a constant current source for providing said first and second base signals in response to a reference current source.
Claim 13
Dependent Claim
96 words
A phase comparing circuit as in claim 11; wherein: said converting means includes a first converting current mirror having an input transistor for accepting the first pilot component and an output transistor for providing said first reference signal and a second converting current mirror having an input transistor for accepting the second pilot component and an output transistor for providing said second reference signal; and said base signal generating means includes a base-signal current mirror having an input transistor for accepting the reference current and first and second output transistors for providing said respective base signals.
Claim 14
Dependent Claim
23 words
A phase comparing circuit as in claim 12; wherein said base-signal current mirror has a reference potential of about 1.8 volts applied thereto.
Claim 15
Dependent Claim
192 words
A phase comparing circuit as in claim 11; wherein: the input signal includes a first switching signal and a second switching signal 180° out of phase with the first switching signal; said phase-difference signal generating means includes at least eight bipolar transistors, including first, second, fifth and sixth transistors of one type and third, fourth, seventh and eighth transistors of the other type; the emitters of said first and second transistors, of said third and fourth transistors, of said fifth and sixth transistors and of said seventh and eighth transistors, respectively, are connected for receiving, respectively, said first reference signal, said first base signal, said second reference signal and second base signal; the collectors of said first, third, fifth and seventh transistors are connected to one of said control signal output terminals and the collectors of said second, fourth, sixth and eighth transistors are connected to the other said control signal output terminals; and the bases of said first, third, sixth and eighth transistors are connected for receiving one of said switching signals and the bases of said second, fourth, fifth and seventh transistors are connected for receiving said other switching signal.
References Cited (Backward Citations)
US3821658A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1989-12-15 | 1990-06-16 | 1990-12-16 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1993-12-15 | 1994-06-16 | 1994-12-16 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1997-12-15 | 1998-06-16 | 1998-12-16 | $7700.00 | Window Closed / Lapsed |