US4628215A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Drive circuit for substrate pump
Assignee: Texas Instruments Inc
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Filing: 1984-09-17
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Granted: 1986-12-09
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Expires: 2004-09-17
Abstract
Abstract A substrate pump circuit for generating a negative bias on the substrate of a semiconductor device employs a capacitor coupling an oscillator output to a pump node, and MOS diodes coupling the pump node to a ground terminal and to the substrate node; the MOS diode for the substrate node is reconfigured as an active switch, controlled by a complementary pump circuit. This circuit allows transfer of more charge from the pumping capacitor to the substrate capacitance on each pump cycle. Also, pumped charge is delivered directly to the substrate through ohmic connections, rather than through forward biased injecting junctions.
Inventors
- 👤 Perry W. Lou
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 12:55
CPC Classifications
G; G05; G05F; G05F3/00; G05F3/02; G05F3/08; G05F3/10; G05F3/16; G05F3/20; G05F3/205
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
212 words
A substrate pump circuit for a semiconductor chip, comprising: first and second driver circuits, each having an input and an output, the output of the first being connected to the input of the second, first and second pump capacitors connecting the outputs of the first and second driver circuits to first and second pump nodes, respectively, first and second clamp transistors, said clamp transistors each having a gate, a drain and a source, said clamp transistors each having its gate shorted to its source, the source of said first and second clamp transistors connected to said first and second pump nodes, respectively, said clamp transistors each having its drain connected to electrical ground, first and second pump transistors, said pump transistors each having a gate and a source-to-drain path, the source-to-drain path of said first and second pump transistors connected between the substrate of said chip and said first and second pump nodes, respectively, the second pump transistor having its gate connected to said first pump node, and means for biasing the gate of said first pump transistor so that said source-to-drain path of said first transistor is non-conductive during such time as the voltage of said first pump node causes the source-to-drain path of said first clamp transistor to be conductive.
Claim 2
Dependent Claim
212 words
A substrate pump circuit for a semiconductor chip, comprising: first and second driver circuits, each having an input and an output, the output of the first being connected to the input of the second, first and second pump capacitors connecting the outputs of the first and second driver circuits to first and second pump nodes, respectively, first and second clamp transistors, said clamp transistors each having a gate, a drain and a source, said clamp transistors each having its gate shorted to its source, the source of said first and second clamp transistors connected to said first and second pump nodes, respectively, said clamp transistors each having its drain connected to electrical ground, first and second pump transistors, said pump transistors each having a gate and a source-to-drain path, the source-to-drain path of said first and second pump transistors connected between the substrate of said chip and said first and second pump nodes, respectively, the second pump transistor having its gate connected to said first pump node, and means for biasing the gate of said first pump transistor so that said source-to-drain path of said first transistor is non-conductive during such time as the voltage of said first pump node causes the source-to-drain path of said first clamp transistor to be conductive.
Claim 3
Dependent Claim
24 words
A circuit according to claim 1 wherein said biasing means comprises means for connecting the gate of said first pump transistor to said substrate.
Claim 4
Dependent Claim
19 words
A circuit according to claim 1 wherein said first and second driver circuits are in a ring oscillator circuit.
Claim 5
Dependent Claim
33 words
A circuit according to claim 3 wherein said biasing means comprises means for coupling the gate of said first pump transistor to a pump node in a prior stage of said ring oscillator.
Claim 6
Dependent Claim
43 words
A circuit according to claim 4 including a regulating transistor having a source-to-drain path in series with each said clamp transistor, each regulating transistor having a gate connected to a voltage varying in response to the bias of the substrate of said chip.
Claim 7
Dependent Claim
135 words
A substrate pump circuit for a semiconductor chip, comprising: a plurality of inverters, each inverter having an input and an output, the output of each of said inverters connected to the input of another of said inverters; a plurality of drive circuits, each drive circuit associated with one of said inverters, and each drive circuit comprising: a pump node, a capacitor connected between said pump node and the output of the inverter stage associated with said drive circuit, a first transistor having a source-to-drain path coupling said pump node to a ground terminal and having a gate connected to said pump node, and a second transistor having a source-to-drain path coupling said pump node to the substrate of said chip, and having a gate connected to the pump node of another of said drive circuits.
Claim 8
Dependent Claim
135 words
A substrate pump circuit for a semiconductor chip, comprising: a plurality of inverters, each inverter having an input and an output, the output of each of said inverters connected to the input of another of said inverters; a plurality of drive circuits, each drive circuit associated with one of said inverters, and each drive circuit comprising: a pump node, a capacitor connected between said pump node and the output of the inverter stage associated with said drive circuit, a first transistor having a source-to-drain path coupling said pump node to a ground terminal and having a gate connected to said pump node, and a second transistor having a source-to-drain path coupling said pump node to the substrate of said chip, and having a gate connected to the pump node of another of said drive circuits.
Claim 9
Dependent Claim
45 words
A circuit according to claim 6 wherein each of said drive circuits includes a regulating transistor having a source-to-drain path in series with said first transistor, each regulating transistor having a gate connected to a voltage varying in response to the voltage on said substrate.
Claim 10
Dependent Claim
17 words
A circuit according to claim 6 wherein said plurality of inverters are connected as a ring oscillator.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1989-12-08 | 1990-06-09 | 1990-12-09 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1993-12-08 | 1994-06-09 | 1994-12-09 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1997-12-08 | 1998-06-09 | 1998-12-09 | $7700.00 | Window Closed / Lapsed |