US4626758A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Digital valve control apparatus
Assignee: Tokyo Keiki Inc
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Filing: 1986-01-22
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Granted: 1986-12-02
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Expires: 2006-01-22
Abstract
Abstract A digital valve control apparatus for regulating opening of a digital valve by a pulse motor, comprising means for setting desired position and displacement speed of the pulse motor and means for selecting the set position and the set speed in response to instruction signals. While pulses having period corresponding to the set speed are produced by a frequency divider, the present position of the pulse motor is compared with the set position by a comparator. The pulses are fed to a counter which counts up or down to supply the output for driving the pulse motor until the comparator produces the coincident output.
Inventors
- 👤 Kunihiko Takeuchi
- 👤 Fujio Baba
- 👤 Kiyoshi Hayashi
- 👤 Yasuo Shimomura
- 👤 Yuji Morishige
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 08:39
CPC Classifications
G; G05; G05B; G05B19/00; G05B19/02; G05B19/18; G05B19/19; G05B19/40; G05B2219/00; G05B2219/30; G05B2219/45; G05B2219/45006
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
198 words
A digital valve control apparatus for regulating opening of a digital valve with a pulse motor, comprising: a signal generating means for generating instruction signals to control said digital valve; at least one position setter for setting the absolute position of said pulse motor; a least one speed setter for setting the displacement speed of said pulse motor; a selecting means for selecting a set position signal or signals from said at least position setter and a set speed signal or signals from said at least one speed setter in response to the instruction signals from said signal generating means; a frequency divider for producing pulses having a period corresponding to the set speed by changing the ratio of frequency division in response to the set speed signal selected by said selecting means; a comparator for determining the difference between a present position of said pulse motor and the set position selected by said selecting means; a counter for counting up or counting down synchronously with the frequency divided pulses from said frequency divider until said comparator produces a coincidence output; and a drive means for driving said pulse motor in response to an output of said counter.
Claim 2
Dependent Claim
198 words
A digital valve control apparatus for regulating opening of a digital valve with a pulse motor, comprising: a signal generating means for generating instruction signals to control said digital valve; at least one position setter for setting the absolute position of said pulse motor; a least one speed setter for setting the displacement speed of said pulse motor; a selecting means for selecting a set position signal or signals from said at least position setter and a set speed signal or signals from said at least one speed setter in response to the instruction signals from said signal generating means; a frequency divider for producing pulses having a period corresponding to the set speed by changing the ratio of frequency division in response to the set speed signal selected by said selecting means; a comparator for determining the difference between a present position of said pulse motor and the set position selected by said selecting means; a counter for counting up or counting down synchronously with the frequency divided pulses from said frequency divider until said comparator produces a coincidence output; and a drive means for driving said pulse motor in response to an output of said counter.
Claim 3
Dependent Claim
36 words
A digital valve control apparatus according to claim 1, wherein said counter includes a discriminating means for determining the counting up or the counting down of said counter in response to said output of said comparator.
Claim 4
Dependent Claim
56 words
A digital valve control apparatus according to claim 1, wherein said selecting means includes a priority encoder which selects only the instruction signal having a priority which is higher than that of the other instructions signals when more than two instruction signals from said signal generating means are inputted to said encoder at the same time.
References Cited (Backward Citations)
US4066941A
Cited
US4169991A
Cited
US4445075A
Cited
US4470108A
Cited
US4529922A
Cited
US4528491A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1989-12-01 | 1990-06-02 | 1990-12-02 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1993-12-01 | 1994-06-02 | 1994-12-02 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1997-12-01 | 1998-06-02 | 1998-12-02 | $7700.00 | Window Closed / Lapsed |