Fusible link short detector with array of reference fuses

Claim 2

Circuitry for testing for short circuits in a fusible link array, said array having a plurality of quadrants of discrete fusible links each having a nominal resistance RF, any short circuit in one of said fusible links presenting a resistance which is substantially lower than RF, said circuitry comprising: means for electrically isolating one of said fusible links in each of said quadrants from the other of said links; an array comprising more than two reference fusible links, the total resistance of each reference fusible link array being approximately 1/2 RF; means for simultaneously applying a voltage across one of said fusible links under test in each of said quadrants and across said array of reference fusible links; and means for comparing the voltage across each of said fusible links under test with the voltage across said array of reference fusible links to provide an indication of the presence or absence of a short circuit across one or more of said fusible links under test.

Claim 3

Circuitry for testing for short circuits in a fusible link array, said array having a plurality of quadrants of discrete fusible links, each fusible link having a nominal resistance RF, any short circuit in one of said fusible links presenting a resistance which is substantially lower than RF, said circuitry comprising: means for electrically isolating one of said fusible links in each of said quadrants from the other of said links; an array comprising more than two reference fusible links, the total resistance of said array of reference fusible links being approximately 1/2 RF; a reference voltage circuit, said array of reference fusible links being connected in said reference voltage circuit; means for simultaneously applying a voltage across one of said fusible links under test in each of said quadrants and across said array of reference fusible links; and means for detecting whether the voltage across any of said fusible links under test is larger or smaller than the voltage across said array of reference fusible links.

Claim 4

Circuitry for testing for short circuits in a fusible link array, said array having a plurality of quadrants of discrete fusible links, each fusible link having a nominal resistance RF, any short circuit in one of said fusible links presenting a resistance which is substantially lower than RF, said circuitry comprising: means for electrically isolating one of said fusible links in each of said quadrants from the other of said links; an array comprising more than two reference fusible links, the total resistance of said array of reference fusible links being approximately 1/2 RF; a reference voltage circuit, said array of reference fusible links being connected in said reference voltage circuit; means for simultaneously applying a voltage across one of said fusible links under test in each of said quadrants and across said array of reference fusible links; and means for detecting whether the voltage across any of said fusible links under test is larger or smaller than the voltage across said array of reference fusible links.

Claim 5

Circuitry in accordance with claim 2 in which said fusible links are arranged in an array having individually selectable orthogonal bit lines and word lines, the location of each of said fusible links being defined by the intersection of a bit line and a word line; and said means for electrically isolating one of said fusible links in each of said quadrants comprises means for selecting a given one of said bit lines and a given one of said word lines.

Claim 6

Circuitry in accordance with claim 3 including a voltage source; a first transistor connected to said voltage source through a selected one of said fusible links in each of said quadrants; a second transistor connected to said voltage source through said array of reference fusible links in each of said quadrants; and means for comparing the voltages across said first and second transistors in each of said quadrants to provide an indication of a short circuit across any one of said fusible links under test.